00eb3630a9
Since commit b36581df7e ("spi: imx: Using existing properties for
chipselects") the device tree property 'fsl,spi-num-chipselects' is
unused and it is already marked as obsolete in device tree binding
documentation. Remove the property from the existing DTS files to
avoid its reoccurence on copying.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
294 lines
6.3 KiB
Plaintext
294 lines
6.3 KiB
Plaintext
/*
|
|
* Copyright 2013 Eukréa Electromatique <denis@eukrea.com>
|
|
*
|
|
* This program is free software; you can redistribute it and/or
|
|
* modify it under the terms of the GNU General Public License
|
|
* as published by the Free Software Foundation; either version 2
|
|
* of the License, or (at your option) any later version.
|
|
* This program is distributed in the hope that it will be useful,
|
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
* GNU General Public License for more details.
|
|
*
|
|
* You should have received a copy of the GNU General Public License
|
|
* along with this program; if not, write to the Free Software
|
|
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
|
|
* MA 02110-1301, USA.
|
|
*/
|
|
|
|
/dts-v1/;
|
|
#include "imx51-eukrea-cpuimx51.dtsi"
|
|
#include <dt-bindings/gpio/gpio.h>
|
|
|
|
/ {
|
|
model = "Eukrea CPUIMX51";
|
|
compatible = "eukrea,mbimxsd51","eukrea,cpuimx51", "fsl,imx51";
|
|
|
|
clocks {
|
|
clk24M: can_clock {
|
|
compatible = "fixed-clock";
|
|
#clock-cells = <0>;
|
|
clock-frequency = <24000000>;
|
|
};
|
|
};
|
|
|
|
gpio_keys {
|
|
compatible = "gpio-keys";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_gpiokeys_1>;
|
|
|
|
button-1 {
|
|
label = "BP1";
|
|
gpios = <&gpio3 31 GPIO_ACTIVE_LOW>;
|
|
linux,code = <256>;
|
|
wakeup-source;
|
|
linux,input-type = <1>;
|
|
};
|
|
};
|
|
|
|
leds {
|
|
compatible = "gpio-leds";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_gpioled>;
|
|
|
|
led1 {
|
|
label = "led1";
|
|
gpios = <&gpio3 30 GPIO_ACTIVE_LOW>;
|
|
linux,default-trigger = "heartbeat";
|
|
};
|
|
};
|
|
|
|
regulators {
|
|
compatible = "simple-bus";
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
reg_can: regulator@0 {
|
|
compatible = "regulator-fixed";
|
|
reg = <0>;
|
|
regulator-name = "CAN_RST";
|
|
regulator-min-microvolt = <3300000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
gpio = <&gpio4 15 GPIO_ACTIVE_HIGH>;
|
|
startup-delay-us = <20000>;
|
|
enable-active-high;
|
|
};
|
|
};
|
|
|
|
sound {
|
|
compatible = "eukrea,asoc-tlv320";
|
|
eukrea,model = "imx51-eukrea-tlv320aic23";
|
|
ssi-controller = <&ssi2>;
|
|
fsl,mux-int-port = <2>;
|
|
fsl,mux-ext-port = <3>;
|
|
};
|
|
|
|
usbphy {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
compatible = "simple-bus";
|
|
|
|
usbh1phy: usbh1phy@0 {
|
|
compatible = "usb-nop-xceiv";
|
|
reg = <0>;
|
|
clocks = <&clks IMX5_CLK_USB_PHY_GATE>;
|
|
clock-names = "main_clk";
|
|
clock-frequency = <19200000>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&audmux {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_audmux>;
|
|
status = "okay";
|
|
};
|
|
|
|
&esdhc1 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_esdhc1 &pinctrl_esdhc1_cd>;
|
|
cd-gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
|
|
status = "okay";
|
|
};
|
|
|
|
&ecspi1 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_ecspi1>;
|
|
cs-gpios = <&gpio4 24 GPIO_ACTIVE_LOW>;
|
|
status = "okay";
|
|
|
|
can0: can@0 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_can>;
|
|
compatible = "microchip,mcp2515";
|
|
reg = <0>;
|
|
clocks = <&clk24M>;
|
|
spi-max-frequency = <10000000>;
|
|
interrupt-parent = <&gpio1>;
|
|
interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
|
|
vdd-supply = <®_can>;
|
|
};
|
|
};
|
|
|
|
&i2c1 {
|
|
tlv320aic23: codec@1a {
|
|
compatible = "ti,tlv320aic23";
|
|
reg = <0x1a>;
|
|
};
|
|
};
|
|
|
|
&iomuxc {
|
|
imx51-eukrea {
|
|
pinctrl_audmux: audmuxgrp {
|
|
fsl,pins = <
|
|
MX51_PAD_AUD3_BB_TXD__AUD3_TXD 0x80000000
|
|
MX51_PAD_AUD3_BB_RXD__AUD3_RXD 0x80000000
|
|
MX51_PAD_AUD3_BB_CK__AUD3_TXC 0x80000000
|
|
MX51_PAD_AUD3_BB_FS__AUD3_TXFS 0x80000000
|
|
>;
|
|
};
|
|
|
|
|
|
pinctrl_can: cangrp {
|
|
fsl,pins = <
|
|
MX51_PAD_CSI2_PIXCLK__GPIO4_15 0x80000000 /* nReset */
|
|
MX51_PAD_GPIO1_1__GPIO1_1 0x80000000 /* IRQ */
|
|
>;
|
|
};
|
|
|
|
pinctrl_ecspi1: ecspi1grp {
|
|
fsl,pins = <
|
|
MX51_PAD_CSPI1_MISO__ECSPI1_MISO 0x185
|
|
MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI 0x185
|
|
MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK 0x185
|
|
MX51_PAD_CSPI1_SS0__GPIO4_24 0x80000000 /* CS0 */
|
|
>;
|
|
};
|
|
|
|
pinctrl_esdhc1: esdhc1grp {
|
|
fsl,pins = <
|
|
MX51_PAD_SD1_CMD__SD1_CMD 0x400020d5
|
|
MX51_PAD_SD1_CLK__SD1_CLK 0x20d5
|
|
MX51_PAD_SD1_DATA0__SD1_DATA0 0x20d5
|
|
MX51_PAD_SD1_DATA1__SD1_DATA1 0x20d5
|
|
MX51_PAD_SD1_DATA2__SD1_DATA2 0x20d5
|
|
MX51_PAD_SD1_DATA3__SD1_DATA3 0x20d5
|
|
>;
|
|
};
|
|
|
|
pinctrl_uart1: uart1grp {
|
|
fsl,pins = <
|
|
MX51_PAD_UART1_RXD__UART1_RXD 0x1c5
|
|
MX51_PAD_UART1_TXD__UART1_TXD 0x1c5
|
|
>;
|
|
};
|
|
|
|
pinctrl_uart3: uart3grp {
|
|
fsl,pins = <
|
|
MX51_PAD_UART3_RXD__UART3_RXD 0x1c5
|
|
MX51_PAD_UART3_TXD__UART3_TXD 0x1c5
|
|
>;
|
|
};
|
|
|
|
pinctrl_uart3_rtscts: uart3rtsctsgrp {
|
|
fsl,pins = <
|
|
MX51_PAD_KEY_COL4__UART3_RTS 0x1c5
|
|
MX51_PAD_KEY_COL5__UART3_CTS 0x1c5
|
|
>;
|
|
};
|
|
|
|
pinctrl_backlight_1: backlightgrp-1 {
|
|
fsl,pins = <
|
|
MX51_PAD_DI1_D1_CS__GPIO3_4 0x1f5
|
|
>;
|
|
};
|
|
|
|
pinctrl_esdhc1_cd: esdhc1_cd {
|
|
fsl,pins = <
|
|
MX51_PAD_GPIO1_0__GPIO1_0 0xd5
|
|
>;
|
|
};
|
|
|
|
pinctrl_gpiokeys_1: gpiokeysgrp-1 {
|
|
fsl,pins = <
|
|
MX51_PAD_NANDF_D9__GPIO3_31 0x1f5
|
|
>;
|
|
};
|
|
|
|
pinctrl_gpioled: gpioledgrp-1 {
|
|
fsl,pins = <
|
|
MX51_PAD_NANDF_D10__GPIO3_30 0x80000000
|
|
>;
|
|
};
|
|
|
|
pinctrl_reg_lcd_3v3: reg_lcd_3v3 {
|
|
fsl,pins = <
|
|
MX51_PAD_CSI1_D9__GPIO3_13 0x1f5
|
|
>;
|
|
};
|
|
|
|
pinctrl_usbh1: usbh1grp {
|
|
fsl,pins = <
|
|
MX51_PAD_USBH1_CLK__USBH1_CLK 0x1e5
|
|
MX51_PAD_USBH1_DIR__USBH1_DIR 0x1e5
|
|
MX51_PAD_USBH1_NXT__USBH1_NXT 0x1e5
|
|
MX51_PAD_USBH1_DATA0__USBH1_DATA0 0x1e5
|
|
MX51_PAD_USBH1_DATA1__USBH1_DATA1 0x1e5
|
|
MX51_PAD_USBH1_DATA2__USBH1_DATA2 0x1e5
|
|
MX51_PAD_USBH1_DATA3__USBH1_DATA3 0x1e5
|
|
MX51_PAD_USBH1_DATA4__USBH1_DATA4 0x1e5
|
|
MX51_PAD_USBH1_DATA5__USBH1_DATA5 0x1e5
|
|
MX51_PAD_USBH1_DATA6__USBH1_DATA6 0x1e5
|
|
MX51_PAD_USBH1_DATA7__USBH1_DATA7 0x1e5
|
|
MX51_PAD_USBH1_STP__USBH1_STP 0x1e5
|
|
>;
|
|
};
|
|
|
|
pinctrl_usbh1_vbus: usbh1-vbusgrp {
|
|
fsl,pins = <
|
|
MX51_PAD_EIM_CS3__GPIO2_28 0x1f5
|
|
>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&ssi2 {
|
|
codec-handle = <&tlv320aic23>;
|
|
status = "okay";
|
|
};
|
|
|
|
&uart1 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_uart1>;
|
|
uart-has-rtscts;
|
|
status = "okay";
|
|
};
|
|
|
|
&uart3 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_uart3 &pinctrl_uart3_rtscts>;
|
|
uart-has-rtscts;
|
|
status = "okay";
|
|
};
|
|
|
|
&usbh1 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_usbh1>;
|
|
fsl,usbphy = <&usbh1phy>;
|
|
dr_mode = "host";
|
|
phy_type = "ulpi";
|
|
status = "okay";
|
|
};
|
|
|
|
&usbotg {
|
|
dr_mode = "otg";
|
|
phy_type = "utmi_wide";
|
|
status = "okay";
|
|
};
|
|
|
|
&usbphy0 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_usbh1_vbus>;
|
|
reset-gpios = <&gpio2 28 GPIO_ACTIVE_LOW>;
|
|
};
|