forked from Minki/linux
cd49104d99
/* should be ok this time, I aligned this patch to your arm:pxa2.mbox */ 1. move pxa25x specific IRQ initialization code to pxa25x_init_irq() and pxa27x code to pxa27x_init_irq(), remove pxa_init_irq() 2. replace all pxa_init_irq() with their PXA25x or PXA27x specific functions Signed-off-by: eric miao <eric.miao@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
149 lines
3.4 KiB
C
149 lines
3.4 KiB
C
/*
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* linux/arch/arm/mach-pxa/pxa25x.c
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*
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* Author: Nicolas Pitre
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* Created: Jun 15, 2001
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* Copyright: MontaVista Software Inc.
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*
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* Code specific to PXA21x/25x/26x variants.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* Since this file should be linked before any other machine specific file,
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* the __initcall() here will be executed first. This serves as default
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* initialization stuff for PXA machines which can be overridden later if
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* need be.
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/pm.h>
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#include <asm/hardware.h>
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#include <asm/arch/irqs.h>
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#include <asm/arch/pxa-regs.h>
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#include <asm/arch/pm.h>
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#include "generic.h"
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/*
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* Various clock factors driven by the CCCR register.
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*/
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/* Crystal Frequency to Memory Frequency Multiplier (L) */
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static unsigned char L_clk_mult[32] = { 0, 27, 32, 36, 40, 45, 0, };
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/* Memory Frequency to Run Mode Frequency Multiplier (M) */
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static unsigned char M_clk_mult[4] = { 0, 1, 2, 4 };
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/* Run Mode Frequency to Turbo Mode Frequency Multiplier (N) */
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/* Note: we store the value N * 2 here. */
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static unsigned char N2_clk_mult[8] = { 0, 0, 2, 3, 4, 0, 6, 0 };
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/* Crystal clock */
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#define BASE_CLK 3686400
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/*
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* Get the clock frequency as reflected by CCCR and the turbo flag.
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* We assume these values have been applied via a fcs.
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* If info is not 0 we also display the current settings.
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*/
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unsigned int get_clk_frequency_khz(int info)
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{
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unsigned long cccr, turbo;
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unsigned int l, L, m, M, n2, N;
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cccr = CCCR;
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asm( "mrc\tp14, 0, %0, c6, c0, 0" : "=r" (turbo) );
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l = L_clk_mult[(cccr >> 0) & 0x1f];
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m = M_clk_mult[(cccr >> 5) & 0x03];
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n2 = N2_clk_mult[(cccr >> 7) & 0x07];
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L = l * BASE_CLK;
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M = m * L;
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N = n2 * M / 2;
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if(info)
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{
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L += 5000;
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printk( KERN_INFO "Memory clock: %d.%02dMHz (*%d)\n",
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L / 1000000, (L % 1000000) / 10000, l );
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M += 5000;
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printk( KERN_INFO "Run Mode clock: %d.%02dMHz (*%d)\n",
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M / 1000000, (M % 1000000) / 10000, m );
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N += 5000;
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printk( KERN_INFO "Turbo Mode clock: %d.%02dMHz (*%d.%d, %sactive)\n",
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N / 1000000, (N % 1000000) / 10000, n2 / 2, (n2 % 2) * 5,
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(turbo & 1) ? "" : "in" );
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}
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return (turbo & 1) ? (N/1000) : (M/1000);
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}
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EXPORT_SYMBOL(get_clk_frequency_khz);
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/*
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* Return the current memory clock frequency in units of 10kHz
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*/
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unsigned int get_memclk_frequency_10khz(void)
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{
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return L_clk_mult[(CCCR >> 0) & 0x1f] * BASE_CLK / 10000;
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}
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EXPORT_SYMBOL(get_memclk_frequency_10khz);
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/*
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* Return the current LCD clock frequency in units of 10kHz
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*/
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unsigned int get_lcdclk_frequency_10khz(void)
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{
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return get_memclk_frequency_10khz();
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}
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EXPORT_SYMBOL(get_lcdclk_frequency_10khz);
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#ifdef CONFIG_PM
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void pxa_cpu_pm_enter(suspend_state_t state)
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{
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extern void pxa_cpu_suspend(unsigned int);
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extern void pxa_cpu_resume(void);
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CKEN = 0;
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switch (state) {
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case PM_SUSPEND_MEM:
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/* set resume return address */
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PSPR = virt_to_phys(pxa_cpu_resume);
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pxa_cpu_suspend(PWRMODE_SLEEP);
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break;
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}
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}
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static struct pm_ops pxa25x_pm_ops = {
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.enter = pxa_pm_enter,
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.valid = pm_valid_only_mem,
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};
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#endif
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void __init pxa25x_init_irq(void)
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{
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pxa_init_irq_low();
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pxa_init_irq_gpio(85);
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}
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static int __init pxa25x_init(void)
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{
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if (cpu_is_pxa21x() || cpu_is_pxa25x()) {
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#ifdef CONFIG_PM
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pm_set_ops(&pxa25x_pm_ops);
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#endif
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}
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return 0;
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}
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subsys_initcall(pxa25x_init);
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