cf1c97dcb9
i915_irq.c is large. It serves as the central dispatch and handler for all of our device interrupts. Lets break it up by pulling out the GT interrupt handlers. Based on a patch by Chris Wilson. Signed-off-by: Andi Shyti <andi.shyti@intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/20190811210633.18417-1-chris@chris-wilson.co.uk
45 lines
1.2 KiB
C
45 lines
1.2 KiB
C
/*
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* SPDX-License-Identifier: MIT
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*
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* Copyright © 2019 Intel Corporation
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*/
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#ifndef INTEL_GT_IRQ_H
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#define INTEL_GT_IRQ_H
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#include <linux/types.h>
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struct intel_gt;
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#define GEN8_GT_IRQS (GEN8_GT_RCS_IRQ | \
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GEN8_GT_BCS_IRQ | \
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GEN8_GT_VCS0_IRQ | \
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GEN8_GT_VCS1_IRQ | \
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GEN8_GT_VECS_IRQ | \
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GEN8_GT_PM_IRQ | \
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GEN8_GT_GUC_IRQ)
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void gen11_gt_irq_reset(struct intel_gt *gt);
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void gen11_gt_irq_postinstall(struct intel_gt *gt);
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void gen11_gt_irq_handler(struct intel_gt *gt, const u32 master_ctl);
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bool gen11_gt_reset_one_iir(struct intel_gt *gt,
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const unsigned int bank,
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const unsigned int bit);
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void gen5_gt_irq_handler(struct intel_gt *gt, u32 gt_iir);
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void gen5_gt_irq_postinstall(struct intel_gt *gt);
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void gen5_gt_irq_reset(struct intel_gt *gt);
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void gen5_gt_disable_irq(struct intel_gt *gt, u32 mask);
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void gen5_gt_enable_irq(struct intel_gt *gt, u32 mask);
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void gen6_gt_irq_handler(struct intel_gt *gt, u32 gt_iir);
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void gen8_gt_irq_ack(struct intel_gt *gt, u32 master_ctl, u32 gt_iir[4]);
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void gen8_gt_irq_reset(struct intel_gt *gt);
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void gen8_gt_irq_handler(struct intel_gt *gt, u32 master_ctl, u32 gt_iir[4]);
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void gen8_gt_irq_postinstall(struct intel_gt *gt);
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#endif /* INTEL_GT_IRQ_H */
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