78b772e1a0
So far if we had a mismatch between the state asked and what was programmed in hardware for PSR, this mismatch would go unnoticed. So here adding the PSR to the hardware configuration readout, EDP_PSR_CTL and EDP_PSR2_CTL can't be directly read because its state flips due to other factors like frontbuffer modifications and CRC. Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com> Signed-off-by: José Roberto de Souza <jose.souza@intel.com> Reviewed-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210418002126.87882-1-jose.souza@intel.com
56 lines
2.0 KiB
C
56 lines
2.0 KiB
C
/* SPDX-License-Identifier: MIT */
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/*
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* Copyright © 2019 Intel Corporation
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*/
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#ifndef __INTEL_PSR_H__
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#define __INTEL_PSR_H__
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#include "intel_frontbuffer.h"
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struct drm_connector;
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struct drm_connector_state;
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struct drm_i915_private;
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struct intel_crtc_state;
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struct intel_dp;
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struct intel_crtc;
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struct intel_atomic_state;
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struct intel_plane_state;
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struct intel_plane;
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struct intel_encoder;
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void intel_psr_init_dpcd(struct intel_dp *intel_dp);
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void intel_psr_enable(struct intel_dp *intel_dp,
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const struct intel_crtc_state *crtc_state,
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const struct drm_connector_state *conn_state);
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void intel_psr_disable(struct intel_dp *intel_dp,
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const struct intel_crtc_state *old_crtc_state);
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void intel_psr_update(struct intel_dp *intel_dp,
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const struct intel_crtc_state *crtc_state,
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const struct drm_connector_state *conn_state);
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int intel_psr_debug_set(struct intel_dp *intel_dp, u64 value);
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void intel_psr_invalidate(struct drm_i915_private *dev_priv,
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unsigned frontbuffer_bits,
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enum fb_op_origin origin);
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void intel_psr_flush(struct drm_i915_private *dev_priv,
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unsigned frontbuffer_bits,
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enum fb_op_origin origin);
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void intel_psr_init(struct intel_dp *intel_dp);
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void intel_psr_compute_config(struct intel_dp *intel_dp,
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struct intel_crtc_state *crtc_state);
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void intel_psr_get_config(struct intel_encoder *encoder,
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struct intel_crtc_state *pipe_config);
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void intel_psr_irq_handler(struct intel_dp *intel_dp, u32 psr_iir);
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void intel_psr_short_pulse(struct intel_dp *intel_dp);
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void intel_psr_wait_for_idle(const struct intel_crtc_state *new_crtc_state);
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bool intel_psr_enabled(struct intel_dp *intel_dp);
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int intel_psr2_sel_fetch_update(struct intel_atomic_state *state,
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struct intel_crtc *crtc);
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void intel_psr2_program_trans_man_trk_ctl(const struct intel_crtc_state *crtc_state);
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void intel_psr2_program_plane_sel_fetch(struct intel_plane *plane,
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const struct intel_crtc_state *crtc_state,
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const struct intel_plane_state *plane_state,
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int color_plane);
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#endif /* __INTEL_PSR_H__ */
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