forked from Minki/linux
b987e98e50
The KSZ9477 is a fully integrated layer 2, managed, 7 ports GigE switch with numerous advanced features. 5 ports incorporate 10/100/1000 Mbps PHYs. The other 2 ports have interfaces that can be configured as SGMII, RGMII, MII or RMII. Either of these may connect directly to a host processor or to an external PHY. The SGMII port may interface to a fiber optic transceiver. This driver currently supports vlan, fdb, mdb & mirror dsa switch operations. Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Woojung Huh <Woojung.Huh@microchip.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
217 lines
4.9 KiB
C
217 lines
4.9 KiB
C
/*
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* Microchip KSZ series register access through SPI
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*
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* Copyright (C) 2017
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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#include <asm/unaligned.h>
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#include <linux/delay.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/spi/spi.h>
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#include "ksz_priv.h"
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/* SPI frame opcodes */
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#define KS_SPIOP_RD 3
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#define KS_SPIOP_WR 2
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#define SPI_ADDR_SHIFT 24
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#define SPI_ADDR_MASK (BIT(SPI_ADDR_SHIFT) - 1)
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#define SPI_TURNAROUND_SHIFT 5
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static int ksz_spi_read_reg(struct spi_device *spi, u32 reg, u8 *val,
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unsigned int len)
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{
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u32 txbuf;
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int ret;
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txbuf = reg & SPI_ADDR_MASK;
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txbuf |= KS_SPIOP_RD << SPI_ADDR_SHIFT;
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txbuf <<= SPI_TURNAROUND_SHIFT;
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txbuf = cpu_to_be32(txbuf);
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ret = spi_write_then_read(spi, &txbuf, 4, val, len);
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return ret;
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}
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static int ksz_spi_read(struct ksz_device *dev, u32 reg, u8 *data,
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unsigned int len)
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{
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struct spi_device *spi = dev->priv;
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return ksz_spi_read_reg(spi, reg, data, len);
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}
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static int ksz_spi_read8(struct ksz_device *dev, u32 reg, u8 *val)
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{
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return ksz_spi_read(dev, reg, val, 1);
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}
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static int ksz_spi_read16(struct ksz_device *dev, u32 reg, u16 *val)
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{
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int ret = ksz_spi_read(dev, reg, (u8 *)val, 2);
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if (!ret)
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*val = be16_to_cpu(*val);
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return ret;
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}
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static int ksz_spi_read24(struct ksz_device *dev, u32 reg, u32 *val)
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{
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int ret;
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*val = 0;
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ret = ksz_spi_read(dev, reg, (u8 *)val, 3);
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if (!ret) {
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*val = be32_to_cpu(*val);
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/* convert to 24bit */
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*val >>= 8;
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}
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return ret;
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}
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static int ksz_spi_read32(struct ksz_device *dev, u32 reg, u32 *val)
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{
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int ret = ksz_spi_read(dev, reg, (u8 *)val, 4);
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if (!ret)
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*val = be32_to_cpu(*val);
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return ret;
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}
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static int ksz_spi_write_reg(struct spi_device *spi, u32 reg, u8 *val,
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unsigned int len)
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{
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u32 txbuf;
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u8 data[12];
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int i;
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txbuf = reg & SPI_ADDR_MASK;
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txbuf |= (KS_SPIOP_WR << SPI_ADDR_SHIFT);
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txbuf <<= SPI_TURNAROUND_SHIFT;
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txbuf = cpu_to_be32(txbuf);
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data[0] = txbuf & 0xFF;
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data[1] = (txbuf & 0xFF00) >> 8;
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data[2] = (txbuf & 0xFF0000) >> 16;
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data[3] = (txbuf & 0xFF000000) >> 24;
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for (i = 0; i < len; i++)
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data[i + 4] = val[i];
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return spi_write(spi, &data, 4 + len);
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}
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static int ksz_spi_write8(struct ksz_device *dev, u32 reg, u8 value)
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{
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struct spi_device *spi = dev->priv;
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return ksz_spi_write_reg(spi, reg, &value, 1);
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}
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static int ksz_spi_write16(struct ksz_device *dev, u32 reg, u16 value)
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{
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struct spi_device *spi = dev->priv;
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value = cpu_to_be16(value);
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return ksz_spi_write_reg(spi, reg, (u8 *)&value, 2);
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}
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static int ksz_spi_write24(struct ksz_device *dev, u32 reg, u32 value)
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{
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struct spi_device *spi = dev->priv;
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/* make it to big endian 24bit from MSB */
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value <<= 8;
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value = cpu_to_be32(value);
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return ksz_spi_write_reg(spi, reg, (u8 *)&value, 3);
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}
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static int ksz_spi_write32(struct ksz_device *dev, u32 reg, u32 value)
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{
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struct spi_device *spi = dev->priv;
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value = cpu_to_be32(value);
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return ksz_spi_write_reg(spi, reg, (u8 *)&value, 4);
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}
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static const struct ksz_io_ops ksz_spi_ops = {
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.read8 = ksz_spi_read8,
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.read16 = ksz_spi_read16,
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.read24 = ksz_spi_read24,
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.read32 = ksz_spi_read32,
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.write8 = ksz_spi_write8,
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.write16 = ksz_spi_write16,
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.write24 = ksz_spi_write24,
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.write32 = ksz_spi_write32,
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};
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static int ksz_spi_probe(struct spi_device *spi)
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{
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struct ksz_device *dev;
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int ret;
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dev = ksz_switch_alloc(&spi->dev, &ksz_spi_ops, spi);
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if (!dev)
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return -ENOMEM;
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if (spi->dev.platform_data)
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dev->pdata = spi->dev.platform_data;
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ret = ksz_switch_register(dev);
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if (ret)
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return ret;
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spi_set_drvdata(spi, dev);
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return 0;
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}
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static int ksz_spi_remove(struct spi_device *spi)
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{
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struct ksz_device *dev = spi_get_drvdata(spi);
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if (dev)
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ksz_switch_remove(dev);
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return 0;
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}
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static const struct of_device_id ksz_dt_ids[] = {
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{ .compatible = "microchip,ksz9477" },
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{},
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};
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MODULE_DEVICE_TABLE(of, ksz_dt_ids);
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static struct spi_driver ksz_spi_driver = {
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.driver = {
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.name = "ksz9477-switch",
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.owner = THIS_MODULE,
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.of_match_table = of_match_ptr(ksz_dt_ids),
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},
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.probe = ksz_spi_probe,
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.remove = ksz_spi_remove,
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};
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module_spi_driver(ksz_spi_driver);
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MODULE_AUTHOR("Woojung Huh <Woojung.Huh@microchip.com>");
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MODULE_DESCRIPTION("Microchip KSZ Series Switch SPI access Driver");
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MODULE_LICENSE("GPL");
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