forked from Minki/linux
245 lines
7.0 KiB
C
245 lines
7.0 KiB
C
/*
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* Copyright (C) 2000, 2001 Broadcom Corporation
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*/
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/*
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* Time routines for the swarm board. We pass all the hard stuff
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* through to the sb1250 handling code. Only thing we really keep
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* track of here is what time of day we think it is. And we don't
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* really even do a good job of that...
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*/
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#include <linux/bcd.h>
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#include <linux/init.h>
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#include <linux/time.h>
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#include <linux/sched.h>
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#include <linux/spinlock.h>
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#include <asm/system.h>
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#include <asm/addrspace.h>
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#include <asm/io.h>
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#include <asm/sibyte/sb1250.h>
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#include <asm/sibyte/sb1250_regs.h>
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#include <asm/sibyte/sb1250_smbus.h>
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static unsigned long long sec_bias = 0;
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static unsigned int usec_bias = 0;
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/* Xicor 1241 definitions */
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/*
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* Register bits
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*/
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#define X1241REG_SR_BAT 0x80 /* currently on battery power */
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#define X1241REG_SR_RWEL 0x04 /* r/w latch is enabled, can write RTC */
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#define X1241REG_SR_WEL 0x02 /* r/w latch is unlocked, can enable r/w now */
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#define X1241REG_SR_RTCF 0x01 /* clock failed */
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#define X1241REG_BL_BP2 0x80 /* block protect 2 */
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#define X1241REG_BL_BP1 0x40 /* block protect 1 */
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#define X1241REG_BL_BP0 0x20 /* block protect 0 */
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#define X1241REG_BL_WD1 0x10
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#define X1241REG_BL_WD0 0x08
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#define X1241REG_HR_MIL 0x80 /* military time format */
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/*
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* Register numbers
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*/
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#define X1241REG_BL 0x10 /* block protect bits */
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#define X1241REG_INT 0x11 /* */
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#define X1241REG_SC 0x30 /* Seconds */
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#define X1241REG_MN 0x31 /* Minutes */
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#define X1241REG_HR 0x32 /* Hours */
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#define X1241REG_DT 0x33 /* Day of month */
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#define X1241REG_MO 0x34 /* Month */
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#define X1241REG_YR 0x35 /* Year */
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#define X1241REG_DW 0x36 /* Day of Week */
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#define X1241REG_Y2K 0x37 /* Year 2K */
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#define X1241REG_SR 0x3F /* Status register */
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#define X1241_CCR_ADDRESS 0x6F
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#define SMB_CSR(reg) (IOADDR(A_SMB_REGISTER(1, reg)))
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static int xicor_read(uint8_t addr)
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{
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while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
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;
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__raw_writeq((addr >> 8) & 0x7, SMB_CSR(R_SMB_CMD));
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__raw_writeq(addr & 0xff, SMB_CSR(R_SMB_DATA));
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__raw_writeq(V_SMB_ADDR(X1241_CCR_ADDRESS) | V_SMB_TT_WR2BYTE,
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SMB_CSR(R_SMB_START));
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while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
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;
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__raw_writeq(V_SMB_ADDR(X1241_CCR_ADDRESS) | V_SMB_TT_RD1BYTE,
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SMB_CSR(R_SMB_START));
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while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
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;
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if (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_ERROR) {
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/* Clear error bit by writing a 1 */
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__raw_writeq(M_SMB_ERROR, SMB_CSR(R_SMB_STATUS));
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return -1;
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}
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return (__raw_readq(SMB_CSR(R_SMB_DATA)) & 0xff);
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}
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static int xicor_write(uint8_t addr, int b)
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{
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while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
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;
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__raw_writeq(addr, SMB_CSR(R_SMB_CMD));
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__raw_writeq((addr & 0xff) | ((b & 0xff) << 8), SMB_CSR(R_SMB_DATA));
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__raw_writeq(V_SMB_ADDR(X1241_CCR_ADDRESS) | V_SMB_TT_WR3BYTE,
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SMB_CSR(R_SMB_START));
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while (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_BUSY)
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;
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if (__raw_readq(SMB_CSR(R_SMB_STATUS)) & M_SMB_ERROR) {
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/* Clear error bit by writing a 1 */
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__raw_writeq(M_SMB_ERROR, SMB_CSR(R_SMB_STATUS));
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return -1;
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} else {
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return 0;
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}
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}
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/*
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* In order to set the CMOS clock precisely, set_rtc_mmss has to be
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* called 500 ms after the second nowtime has started, because when
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* nowtime is written into the registers of the CMOS clock, it will
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* jump to the next second precisely 500 ms later. Check the Motorola
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* MC146818A or Dallas DS12887 data sheet for details.
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*
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* BUG: This routine does not handle hour overflow properly; it just
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* sets the minutes. Usually you'll only notice that after reboot!
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*/
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int set_rtc_mmss(unsigned long nowtime)
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{
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int retval = 0;
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int real_seconds, real_minutes, cmos_minutes;
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cmos_minutes = xicor_read(X1241REG_MN);
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cmos_minutes = BCD2BIN(cmos_minutes);
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/*
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* since we're only adjusting minutes and seconds,
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* don't interfere with hour overflow. This avoids
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* messing with unknown time zones but requires your
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* RTC not to be off by more than 15 minutes
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*/
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real_seconds = nowtime % 60;
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real_minutes = nowtime / 60;
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if (((abs(real_minutes - cmos_minutes) + 15)/30) & 1)
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real_minutes += 30; /* correct for half hour time zone */
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real_minutes %= 60;
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/* unlock writes to the CCR */
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xicor_write(X1241REG_SR, X1241REG_SR_WEL);
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xicor_write(X1241REG_SR, X1241REG_SR_WEL | X1241REG_SR_RWEL);
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if (abs(real_minutes - cmos_minutes) < 30) {
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real_seconds = BIN2BCD(real_seconds);
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real_minutes = BIN2BCD(real_minutes);
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xicor_write(X1241REG_SC, real_seconds);
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xicor_write(X1241REG_MN, real_minutes);
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} else {
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printk(KERN_WARNING
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"set_rtc_mmss: can't update from %d to %d\n",
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cmos_minutes, real_minutes);
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retval = -1;
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}
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xicor_write(X1241REG_SR, 0);
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printk("set_rtc_mmss: %02d:%02d\n", real_minutes, real_seconds);
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return retval;
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}
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static unsigned long __init get_swarm_time(void)
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{
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unsigned int year, mon, day, hour, min, sec, y2k;
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sec = xicor_read(X1241REG_SC);
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min = xicor_read(X1241REG_MN);
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hour = xicor_read(X1241REG_HR);
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if (hour & X1241REG_HR_MIL) {
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hour &= 0x3f;
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} else {
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if (hour & 0x20)
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hour = (hour & 0xf) + 0x12;
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}
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sec = BCD2BIN(sec);
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min = BCD2BIN(min);
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hour = BCD2BIN(hour);
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day = xicor_read(X1241REG_DT);
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mon = xicor_read(X1241REG_MO);
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year = xicor_read(X1241REG_YR);
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y2k = xicor_read(X1241REG_Y2K);
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day = BCD2BIN(day);
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mon = BCD2BIN(mon);
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year = BCD2BIN(year);
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y2k = BCD2BIN(y2k);
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year += (y2k * 100);
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return mktime(year, mon, day, hour, min, sec);
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}
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/*
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* Bring up the timer at 100 Hz.
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*/
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void __init swarm_time_init(void)
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{
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unsigned int flags;
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int status;
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/* Set up the scd general purpose timer 0 to cpu 0 */
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sb1250_time_init();
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/* Establish communication with the Xicor 1241 RTC */
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/* XXXKW how do I share the SMBus with the I2C subsystem? */
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__raw_writeq(K_SMB_FREQ_400KHZ, SMB_CSR(R_SMB_FREQ));
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__raw_writeq(0, SMB_CSR(R_SMB_CONTROL));
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if ((status = xicor_read(X1241REG_SR_RTCF)) < 0) {
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printk("x1241: couldn't detect on SWARM SMBus 1\n");
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} else {
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if (status & X1241REG_SR_RTCF)
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printk("x1241: battery failed -- time is probably wrong\n");
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write_seqlock_irqsave(&xtime_lock, flags);
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xtime.tv_sec = get_swarm_time();
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xtime.tv_nsec = 0;
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write_sequnlock_irqrestore(&xtime_lock, flags);
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}
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}
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