Guennadi Liakhovetski ca8b387803 DMA: shdma: support the new CHCLR register layout ... On newer r-car SoCs the CHCLR register only contains one bit per channel, to which a 1 has to be written to reset the channel. Older SoC versions had one CHCLR register per channel, to which a 0 must be written to reset the channel and clear its buffers. This patch adds support for the newer layout. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>		2013-08-27 14:24:07 +05:30
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Kconfig	sudmac: add support for SUDMAC	2013-04-30 15:50:12 +05:30
Makefile	DMA: shdma: add DT support	2013-07-05 11:41:00 +05:30
shdma-base.c	DMA: shdma: add DT support	2013-07-05 11:41:00 +05:30
shdma-of.c	DMA: shdma: add DT support	2013-07-05 11:41:00 +05:30
shdma.c	DMA: shdma: support the new CHCLR register layout	2013-08-27 14:24:07 +05:30
shdma.h	DMA: shdma: switch all __iomem pointers to void	2013-08-25 11:54:35 +05:30
sudmac.c	sudmac: add support for SUDMAC	2013-04-30 15:50:12 +05:30