forked from Minki/linux
ca88479c1c
For i945 and earlier chips, the backlight frequency value had the low bit (of 16) fixed to zero. The Pineview code path handled this by just exposing the backlight range as 15 bits while other chips had the backlight range limited to 0 .. 0xfffe. This patch makes everyone take the pineview code path, providing 15 bits of backlight duty cycle range which seems more than sufficient to me. Daniel Mack reported that writing 1 to bit 0 of the duty cycle register was causing problems on his Samsung X20 notebook, even when the duty cycle value was less than the maximum backlight value. (He tried a value of 29749 with max_brightness of 29750). This patch never writes a '1' to that bit. Signed-off-by: Keith Packard <keithp@keithp.com> Reviewed-by: Takashi Iwai <tiwai@suse.de> Reported-and-tested-by: Daniel Mack <zonque@gmail.com> Cc: stable@kernel.org |
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exynos | ||
i2c | ||
i810 | ||
i915 | ||
mga | ||
nouveau | ||
r128 | ||
radeon | ||
savage | ||
sis | ||
tdfx | ||
ttm | ||
via | ||
vmwgfx | ||
ati_pcigart.c | ||
drm_agpsupport.c | ||
drm_auth.c | ||
drm_buffer.c | ||
drm_bufs.c | ||
drm_cache.c | ||
drm_context.c | ||
drm_crtc_helper.c | ||
drm_crtc.c | ||
drm_debugfs.c | ||
drm_dma.c | ||
drm_dp_i2c_helper.c | ||
drm_drv.c | ||
drm_edid_modes.h | ||
drm_edid.c | ||
drm_encoder_slave.c | ||
drm_fb_helper.c | ||
drm_fops.c | ||
drm_gem.c | ||
drm_global.c | ||
drm_hashtab.c | ||
drm_info.c | ||
drm_ioc32.c | ||
drm_ioctl.c | ||
drm_irq.c | ||
drm_lock.c | ||
drm_memory.c | ||
drm_mm.c | ||
drm_modes.c | ||
drm_pci.c | ||
drm_platform.c | ||
drm_proc.c | ||
drm_scatter.c | ||
drm_sman.c | ||
drm_stub.c | ||
drm_sysfs.c | ||
drm_trace_points.c | ||
drm_trace.h | ||
drm_usb.c | ||
drm_vm.c | ||
Kconfig | ||
Makefile | ||
README.drm |
************************************************************ * For the very latest on DRI development, please see: * * http://dri.freedesktop.org/ * ************************************************************ The Direct Rendering Manager (drm) is a device-independent kernel-level device driver that provides support for the XFree86 Direct Rendering Infrastructure (DRI). The DRM supports the Direct Rendering Infrastructure (DRI) in four major ways: 1. The DRM provides synchronized access to the graphics hardware via the use of an optimized two-tiered lock. 2. The DRM enforces the DRI security policy for access to the graphics hardware by only allowing authenticated X11 clients access to restricted regions of memory. 3. The DRM provides a generic DMA engine, complete with multiple queues and the ability to detect the need for an OpenGL context switch. 4. The DRM is extensible via the use of small device-specific modules that rely extensively on the API exported by the DRM module. Documentation on the DRI is available from: http://dri.freedesktop.org/wiki/Documentation http://sourceforge.net/project/showfiles.php?group_id=387 http://dri.sourceforge.net/doc/ For specific information about kernel-level support, see: The Direct Rendering Manager, Kernel Support for the Direct Rendering Infrastructure http://dri.sourceforge.net/doc/drm_low_level.html Hardware Locking for the Direct Rendering Infrastructure http://dri.sourceforge.net/doc/hardware_locking_low_level.html A Security Analysis of the Direct Rendering Infrastructure http://dri.sourceforge.net/doc/security_low_level.html