forked from Minki/linux
ca590c1c45
DPIB is read currently from a buffer position in memory (indicated by the registers DPIB[U|L]BASE).Driver reads the position buffer on BDL completion interrupts to report the DMA position. But the BDL completion interrupt only indicates the last DMA transfer of the buffer is completed at the Intel HD Audio subsystem boundary. The periodic DMA Position-in-Buffer writes may be scheduled at the same time or later than the MSI and does not guarantee to reflect the position of the last buffer that was transferred. Whereas DPIB register in HDA space(vendor specific register indicated by SDxDPIB) reflects the actual data that is transferred. Hence update the position based on DPIB for playback. Signed-off-by: Dharageswari R <dharageswari.r@intel.com> Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org> |
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| baytrail | ||
| boards | ||
| common | ||
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| skylake | ||
| Kconfig | ||
| Makefile | ||