4fa483e5b3
smumgr provides the interface for interacting with the smu firmware which handles power management. v2: squash in updates (Alex) Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
44 lines
1.7 KiB
C
44 lines
1.7 KiB
C
/*
|
|
* Copyright 2016 Advanced Micro Devices, Inc.
|
|
*
|
|
* Permission is hereby granted, free of charge, to any person obtaining a
|
|
* copy of this software and associated documentation files (the "Software"),
|
|
* to deal in the Software without restriction, including without limitation
|
|
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
|
* and/or sell copies of the Software, and to permit persons to whom the
|
|
* Software is furnished to do so, subject to the following conditions:
|
|
*
|
|
* The above copyright notice and this permission notice shall be included in
|
|
* all copies or substantial portions of the Software.
|
|
*
|
|
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
|
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
|
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
|
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
|
|
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
|
|
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
|
* OTHER DEALINGS IN THE SOFTWARE.
|
|
*
|
|
*/
|
|
|
|
#ifndef RAVEN_INC_H
|
|
#define RAVEN_INC_H
|
|
|
|
|
|
#include "asic_reg/raven1/MP/mp_10_0_default.h"
|
|
#include "asic_reg/raven1/MP/mp_10_0_offset.h"
|
|
#include "asic_reg/raven1/MP/mp_10_0_sh_mask.h"
|
|
|
|
#include "asic_reg/raven1/NBIO/nbio_7_0_default.h"
|
|
#include "asic_reg/raven1/NBIO/nbio_7_0_offset.h"
|
|
#include "asic_reg/raven1/NBIO/nbio_7_0_sh_mask.h"
|
|
|
|
#include "asic_reg/raven1/THM/thm_10_0_default.h"
|
|
#include "asic_reg/raven1/THM/thm_10_0_offset.h"
|
|
#include "asic_reg/raven1/THM/thm_10_0_sh_mask.h"
|
|
|
|
|
|
#define ixDDI_PHY_GEN_STATUS 0x3FCE8
|
|
|
|
#endif
|