linux/arch
Borislav Petkov c6a9583fb4 x86/mce: Check MCi_STATUS[MISCV] for usable addr on Intel only
mce_usable_address() does a bunch of basic sanity checks to verify
whether the address reported with the error is usable for further
processing. However, we do check MCi_STATUS[MISCV] and that is not
needed on AMD as that bit says that there's additional information about
the logged error in the MCi_MISCj banks.

But we don't need that to know whether the address is usable - we only
need to know whether the physical address is valid - i.e., ADDRV.

On Intel the MISCV bit is needed to perform additional checks to determine
whether the reported address is a physical one, etc.

Signed-off-by: Borislav Petkov <bp@suse.de>
Cc: Yazen Ghannam <yazen.ghannam@amd.com>
Cc: Tony Luck <tony.luck@intel.com>
Cc: linux-edac <linux-edac@vger.kernel.org>
Link: http://lkml.kernel.org/r/20170418183924.6agjkebilwqj26or@pd.tnic
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2017-04-19 12:04:46 +02:00
..
alpha sched/headers: Move task->mm handling methods to <linux/sched/mm.h> 2017-03-03 01:43:28 +01:00
arc arch, mm: convert all architectures to use 5level-fixup.h 2017-03-09 11:48:47 -08:00
arm ARM: SoC fixes for v4.11 2017-03-24 14:32:21 -07:00
arm64 ARM: SoC fixes for v4.11 2017-03-24 14:32:21 -07:00
avr32 arch, mm: convert all architectures to use 5level-fixup.h 2017-03-09 11:48:47 -08:00
blackfin sched/headers: Move task->mm handling methods to <linux/sched/mm.h> 2017-03-03 01:43:28 +01:00
c6x sched/headers: Prepare for new header dependencies before moving code to <linux/sched/task_stack.h> 2017-03-02 08:42:36 +01:00
cris Merge branch 'prep-for-5level' 2017-03-10 08:59:07 -08:00
frv arch, mm: convert all architectures to use 5level-fixup.h 2017-03-09 11:48:47 -08:00
h8300 arch, mm: convert all architectures to use 5level-fixup.h 2017-03-09 11:48:47 -08:00
hexagon arch, mm: convert all architectures to use 5level-fixup.h 2017-03-09 11:48:47 -08:00
ia64 arch, mm: convert all architectures to use 5level-fixup.h 2017-03-09 11:48:47 -08:00
m32r sched/headers: Move task->mm handling methods to <linux/sched/mm.h> 2017-03-03 01:43:28 +01:00
m68k m68k: Wire up statx 2017-03-20 11:27:28 +01:00
metag arch, mm: convert all architectures to use 5level-fixup.h 2017-03-09 11:48:47 -08:00
microblaze arch, mm: convert all architectures to use 5level-fixup.h 2017-03-09 11:48:47 -08:00
mips arch, mm: convert all architectures to use 5level-fixup.h 2017-03-09 11:48:47 -08:00
mn10300 arch, mm: convert all architectures to use 5level-fixup.h 2017-03-09 11:48:47 -08:00
nios2 arch, mm: convert all architectures to use 5level-fixup.h 2017-03-09 11:48:47 -08:00
openrisc openrisc: Export symbols needed by modules 2017-03-16 00:12:57 +09:00
parisc parisc: Fix system shutdown halt 2017-03-18 17:27:45 +01:00
powerpc Revert "powerpc/64: Disable use of radix under a hypervisor" 2017-03-21 16:50:28 +11:00
s390 Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/s390/linux 2017-03-12 14:22:25 -07:00
score Fixup for arch/score after extable.h introduction 2017-03-11 14:16:50 -08:00
sh Merge branch 'prep-for-5level' 2017-03-10 08:59:07 -08:00
sparc arch, mm: convert all architectures to use 5level-fixup.h 2017-03-09 11:48:47 -08:00
tile arch, mm: convert all architectures to use 5level-fixup.h 2017-03-09 11:48:47 -08:00
um arch, mm: convert all architectures to use 5level-fixup.h 2017-03-09 11:48:47 -08:00
unicore32 arch, mm: convert all architectures to use 5level-fixup.h 2017-03-09 11:48:47 -08:00
x86 x86/mce: Check MCi_STATUS[MISCV] for usable addr on Intel only 2017-04-19 12:04:46 +02:00
xtensa arch, mm: convert all architectures to use 5level-fixup.h 2017-03-09 11:48:47 -08:00
.gitignore
Kconfig scripts/spelling.txt: add "an user" pattern and fix typo instances 2017-02-27 18:43:46 -08:00