Alexandre Courbot c694ecad9d drm/nouveau/fifo/gf100: take runlist target into account ... Bits 28:29 of RUNLIST_BASE specify the memory target of the runlist. Set it to 0x3 (SYS_MEM_NONCOHERENT) if the runlist object resides in system memory. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>		2016-03-14 10:13:30 +10:00
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drm	drm/nouveau/fifo/gf100: take runlist target into account	2016-03-14 10:13:30 +10:00
host1x	gpu: host1x: Set DMA ops on device creation	2016-03-04 16:24:57 +01:00
ipu-v3	Merge drm-fixes into drm-next.	2016-03-14 09:46:02 +10:00
vga	vga_switcheroo: Add support for switching only the DDC	2016-02-09 11:21:07 +01:00
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