48dea9a700
Add basic support for the Visconti TMPV7708 SoC peripherals -
- CPU
- CA53 x 4 and 2 cluster.
- not support PSCI, currently only spin-table is supported.
- Interrupt controller (ARM Generic Interrupt Controller)
- Timer (ARM architected timer)
- UART (ARM PL011 UART controller)
- SPI (ARM PL022 SPI controller)
- I2C (Synopsys DesignWare APB I2C Controller)
- Pin control (Visconti specific)
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
Reviewed-by: Punit Agrawal <punit1.agrawal@toshiba.co.jp>
44 lines
753 B
Plaintext
44 lines
753 B
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Device Tree File for TMPV7708 RM main board
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*
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* (C) Copyright 2020, Toshiba Corporation.
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* (C) Copyright 2020, Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
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*/
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/dts-v1/;
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#include "tmpv7708.dtsi"
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/ {
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model = "Toshiba TMPV7708 RM main board";
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compatible = "toshiba,tmpv7708-rm-mbrc", "toshiba,tmpv7708";
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aliases {
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serial0 = &uart0;
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serial1 = &uart1;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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/* 768MB memory */
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memory@80000000 {
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device_type = "memory";
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reg = <0x0 0x80000000 0x0 0x30000000>;
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};
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};
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&uart0 {
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status = "okay";
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clocks = <&uart_clk>;
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clock-names = "apb_pclk";
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};
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&uart1 {
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status = "okay";
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clocks = <&uart_clk>;
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clock-names = "apb_pclk";
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};
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