forked from Minki/linux
3d49538364
The omap3_pmx_core pinmux device in the device tree handles the system controller module (SCM) PADCONFS fonction. Its control registers are split in two distinct areas, with other SCM registers in-between. Those other registers can't thus be requested by other drivers as the memory region gets reserved by the pinmux driver. Split the omap3_pmx_core device tree node in two for the two memory regions. The second region address and size depends on the SoC model. The change in omap3.dtsi fixes an "external abort on non-linefetch" when doing cat /sys/kernel/debug/pinctrl/.../pins on a Nokia N900. Note that the core2 padconf region is different for 3430 vs 3630, and does not exist on 3517 as noted by Nishanth Menon <nm@ti.com>. Reported-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-By: Sebastian Reichel <sre@debian.org> Signed-off-by: Nishanth Menon <nm@ti.com> [tony@atomide.com: updated for 3430 vs 3630 core2 based on Nishant's patch] Signed-off-by: Tony Lindgren <tony@atomide.com>
222 lines
5.2 KiB
Plaintext
222 lines
5.2 KiB
Plaintext
/*
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* Common device tree for IGEP boards based on AM/DM37x
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*
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* Copyright (C) 2012 Javier Martinez Canillas <javier@collabora.co.uk>
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* Copyright (C) 2012 Enric Balletbo i Serra <eballetbo@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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/dts-v1/;
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#include "omap36xx.dtsi"
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/ {
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memory {
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device_type = "memory";
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reg = <0x80000000 0x20000000>; /* 512 MB */
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};
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sound {
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compatible = "ti,omap-twl4030";
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ti,model = "igep2";
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ti,mcbsp = <&mcbsp2>;
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ti,codec = <&twl_audio>;
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};
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vdd33: regulator-vdd33 {
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compatible = "regulator-fixed";
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regulator-name = "vdd33";
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regulator-always-on;
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};
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lbee1usjyc_vmmc: lbee1usjyc_vmmc {
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pinctrl-names = "default";
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pinctrl-0 = <&lbee1usjyc_pins>;
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compatible = "regulator-fixed";
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regulator-name = "regulator-lbee1usjyc";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&gpio5 10 GPIO_ACTIVE_HIGH>; /* gpio_138 WIFI_PDN */
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startup-delay-us = <10000>;
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enable-active-high;
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vin-supply = <&vdd33>;
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};
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};
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&omap3_pmx_core {
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uart1_pins: pinmux_uart1_pins {
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pinctrl-single,pins = <
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0x152 (PIN_INPUT | MUX_MODE0) /* uart1_rx.uart1_rx */
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0x14c (PIN_OUTPUT |MUX_MODE0) /* uart1_tx.uart1_tx */
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>;
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};
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uart2_pins: pinmux_uart2_pins {
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pinctrl-single,pins = <
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0x14a (PIN_INPUT | MUX_MODE0) /* uart2_rx.uart2_rx */
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0x148 (PIN_OUTPUT | MUX_MODE0) /* uart2_tx.uart2_tx */
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>;
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};
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uart3_pins: pinmux_uart3_pins {
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pinctrl-single,pins = <
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0x16e (PIN_INPUT | MUX_MODE0) /* uart3_rx.uart3_rx */
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0x170 (PIN_OUTPUT | MUX_MODE0) /* uart3_tx.uart3_tx */
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>;
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};
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/* WiFi/BT combo */
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lbee1usjyc_pins: pinmux_lbee1usjyc_pins {
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pinctrl-single,pins = <
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0x136 (PIN_OUTPUT | MUX_MODE4) /* sdmmc2_dat5.gpio_137 */
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0x138 (PIN_OUTPUT | MUX_MODE4) /* sdmmc2_dat6.gpio_138 */
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0x13a (PIN_OUTPUT | MUX_MODE4) /* sdmmc2_dat7.gpio_139 */
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>;
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};
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mcbsp2_pins: pinmux_mcbsp2_pins {
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pinctrl-single,pins = <
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0x10c (PIN_INPUT | MUX_MODE0) /* mcbsp2_fsx.mcbsp2_fsx */
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0x10e (PIN_INPUT | MUX_MODE0) /* mcbsp2_clkx.mcbsp2_clkx */
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0x110 (PIN_INPUT | MUX_MODE0) /* mcbsp2_dr.mcbsp2.dr */
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0x112 (PIN_OUTPUT | MUX_MODE0) /* mcbsp2_dx.mcbsp2_dx */
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>;
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};
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mmc1_pins: pinmux_mmc1_pins {
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pinctrl-single,pins = <
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0x114 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk.sdmmc1_clk */
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0x116 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd.sdmmc1_cmd */
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0x118 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat0.sdmmc1_dat0 */
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0x11a (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1.sdmmc1_dat1 */
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0x11c (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2.sdmmc1_dat2 */
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0x11e (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3.sdmmc1_dat3 */
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>;
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};
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mmc2_pins: pinmux_mmc2_pins {
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pinctrl-single,pins = <
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0x128 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk.sdmmc2_clk */
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0x12a (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd.sdmmc2_cmd */
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0x12c (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat0.sdmmc2_dat0 */
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0x12e (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1.sdmmc2_dat1 */
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0x130 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2.sdmmc2_dat2 */
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0x132 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3.sdmmc2_dat3 */
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>;
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};
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smsc911x_pins: pinmux_smsc911x_pins {
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pinctrl-single,pins = <
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0x1a2 (PIN_INPUT | MUX_MODE4) /* mcspi1_cs2.gpio_176 */
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>;
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};
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i2c1_pins: pinmux_i2c1_pins {
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pinctrl-single,pins = <
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0x18a (PIN_INPUT | MUX_MODE0) /* i2c1_scl.i2c1_scl */
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0x18c (PIN_INPUT | MUX_MODE0) /* i2c1_sda.i2c1_sda */
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>;
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};
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i2c2_pins: pinmux_i2c2_pins {
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pinctrl-single,pins = <
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0x18e (PIN_INPUT | MUX_MODE0) /* i2c2_scl.i2c2_scl */
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0x190 (PIN_INPUT | MUX_MODE0) /* i2c2_sda.i2c2_sda */
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>;
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};
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i2c3_pins: pinmux_i2c3_pins {
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pinctrl-single,pins = <
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0x192 (PIN_INPUT | MUX_MODE0) /* i2c3_scl.i2c3_scl */
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0x194 (PIN_INPUT | MUX_MODE0) /* i2c3_sda.i2c3_sda */
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>;
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};
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};
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&i2c1 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c1_pins>;
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clock-frequency = <2600000>;
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twl: twl@48 {
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reg = <0x48>;
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interrupts = <7>; /* SYS_NIRQ cascaded to intc */
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interrupt-parent = <&intc>;
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twl_audio: audio {
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compatible = "ti,twl4030-audio";
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codec {
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};
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};
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};
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};
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#include "twl4030.dtsi"
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#include "twl4030_omap3.dtsi"
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&i2c2 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c2_pins>;
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clock-frequency = <400000>;
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};
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&i2c3 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c3_pins>;
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};
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&mcbsp2 {
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pinctrl-names = "default";
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pinctrl-0 = <&mcbsp2_pins>;
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};
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&mmc1 {
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pinctrl-names = "default";
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pinctrl-0 = <&mmc1_pins>;
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vmmc-supply = <&vmmc1>;
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vmmc_aux-supply = <&vsim>;
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bus-width = <4>;
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};
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&mmc2 {
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pinctrl-names = "default";
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pinctrl-0 = <&mmc2_pins>;
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vmmc-supply = <&lbee1usjyc_vmmc>;
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bus-width = <4>;
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non-removable;
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};
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&mmc3 {
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status = "disabled";
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};
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&uart1 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart1_pins>;
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};
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&uart2 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart2_pins>;
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};
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&uart3 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart3_pins>;
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};
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&twl_gpio {
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ti,use-leds;
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};
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&usb_otg_hs {
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interface-type = <0>;
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usb-phy = <&usb2_phy>;
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phys = <&usb2_phy>;
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phy-names = "usb2-phy";
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mode = <3>;
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power = <50>;
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};
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