da958630d5
hwmgr is the interface for the driver to setup state structures which are used by the smu for managing the power state. v2: squash in fixes: - update set_watermarks_for_clocks_ranges to use common code - drop unsupported apis - correct MAX_REGULAR_DPM_NUMBER value - multimonitor fixes - add check for vbios pptable version - revise dpm table setup - init fclk dpm state - Remove unused definition in vega20_hwmgr - support power limit setup - enable vega20 to honour DAL clock limits - comment out dump_table debugging v3: switch to SOC15 register access macros Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
71 lines
2.4 KiB
C
71 lines
2.4 KiB
C
/*
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* Copyright 2018 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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#include "hwmgr.h"
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#include "vega20_hwmgr.h"
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#include "vega20_powertune.h"
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#include "vega20_smumgr.h"
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#include "vega20_ppsmc.h"
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#include "vega20_inc.h"
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#include "pp_debug.h"
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int vega20_set_power_limit(struct pp_hwmgr *hwmgr, uint32_t n)
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{
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struct vega20_hwmgr *data =
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(struct vega20_hwmgr *)(hwmgr->backend);
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if (data->smu_features[GNLD_PPT].enabled)
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return smum_send_msg_to_smc_with_parameter(hwmgr,
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PPSMC_MSG_SetPptLimit, n);
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return 0;
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}
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int vega20_validate_power_level_request(struct pp_hwmgr *hwmgr,
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uint32_t tdp_percentage_adjustment, uint32_t tdp_absolute_value_adjustment)
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{
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return (tdp_percentage_adjustment > hwmgr->platform_descriptor.TDPLimit) ? -1 : 0;
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}
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static int vega20_set_overdrive_target_percentage(struct pp_hwmgr *hwmgr,
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uint32_t adjust_percent)
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{
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return smum_send_msg_to_smc_with_parameter(hwmgr,
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PPSMC_MSG_OverDriveSetPercentage, adjust_percent);
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}
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int vega20_power_control_set_level(struct pp_hwmgr *hwmgr)
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{
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int adjust_percent, result = 0;
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if (PP_CAP(PHM_PlatformCaps_PowerContainment)) {
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adjust_percent =
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hwmgr->platform_descriptor.TDPAdjustmentPolarity ?
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hwmgr->platform_descriptor.TDPAdjustment :
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(-1 * hwmgr->platform_descriptor.TDPAdjustment);
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result = vega20_set_overdrive_target_percentage(hwmgr,
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(uint32_t)adjust_percent);
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}
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return result;
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}
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