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linux/drivers/gpu/drm/amd/include/asic_reg/dcn
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Bhawanpreet Lakha b593bce59b drm/amd/display: Add Renoir registers (v3) 
add registers for dcn, clk, and renoir ip offsets

v2: header cleanup (Alex)
v3: Add DPCS registers (Hersen)

Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-29 15:52:32 -05:00
..
dcn_1_0_offset.h drm/amd/include: Add HUBPREQ_DEBUG register offsets 2019-04-23 17:27:08 -05:00
dcn_1_0_sh_mask.h drm/amdgpu: Add CM_TEST_DEBUG regs for DCN 2018-04-11 13:07:35 -05:00
dcn_2_0_0_offset.h drm/amd/display: Create DWB resource for DCN2 2019-06-22 09:34:11 -05:00
dcn_2_0_0_sh_mask.h drm/amd/display: Create DWB resource for DCN2 2019-06-22 09:34:11 -05:00
dcn_2_1_0_offset.h drm/amd/display: Add Renoir registers (v3) 2019-08-29 15:52:32 -05:00
dcn_2_1_0_sh_mask.h drm/amd/display: Add Renoir registers (v3) 2019-08-29 15:52:32 -05:00
dpcs_2_1_0_offset.h drm/amd/display: Add Renoir registers (v3) 2019-08-29 15:52:32 -05:00
dpcs_2_1_0_sh_mask.h drm/amd/display: Add Renoir registers (v3) 2019-08-29 15:52:32 -05:00