When the connector has VCPI allocated and is being moved to another pipe it causes drm_dp_atomic_release_vcpi_slots() and drm_dp_atomic_find_vcpi_slots() to be called in the same atomic check causing the error bellow. This happens because at this point Intel's hw.enable(and all other flags in the same struct) is not set but checking to on the uapi one it have the expected value. [ 580.804430] ------------[ cut here ]------------ [ 580.804436] WARNING: CPU: 0 PID: 1221 at drivers/gpu/drm/drm_dp_mst_topology.c:4094 drm_dp_atomic_find_vcpi_slots+0x157/0x180 [ 580.804439] Modules linked in: cdc_ether r8152 i915 prime_numbers snd_hda_codec_hdmi snd_hda_intel snd_intel_dspcfg snd_hda_codec snd_hwdep asix snd_hda_core x86_pkg_temp_thermal usbnet mei_hdcp coretemp mii mei_me crct10dif_pclmul snd_pcm crc32_pclmul mei ghash_clmulni_intel i2c_i801 [last unloaded: prime_numbers] [ 580.804462] CPU: 0 PID: 1221 Comm: kworker/0:0 Tainted: G W 5.4.0-rc7-zeh+ #1226 [ 580.804465] Hardware name: Intel Corporation Tiger Lake Client Platform/TigerLake U DDR4 SODIMM RVP, BIOS TGLSFWI1.D00.2321.A09.1909250226 09/25/2019 [ 580.804470] Workqueue: events output_poll_execute [ 580.804476] RIP: 0010:drm_dp_atomic_find_vcpi_slots+0x157/0x180 [ 580.804481] Code: 6a ff ff ff 49 89 6d 08 4c 89 6b 10 4c 89 63 18 49 89 6e 08 e9 55 ff ff ff 41 89 c7 5b 5d 44 89 f8 41 5c 41 5d 41 5e 41 5f c3 <0f> 0b 48 c7 c7 08 73 11 82 48 89 ee 41 bf ea ff ff ff e8 b2 e3 02 [ 580.804484] RSP: 0018:ffffc900009b7ab8 EFLAGS: 00010246 [ 580.804488] RAX: ffff88848c04ef50 RBX: ffff88848c04ef40 RCX: 0000000000000214 [ 580.804492] RDX: ffff88848c04f5e0 RSI: ffff888486eb2c68 RDI: ffff88848e518800 [ 580.804495] RBP: ffff88849d339000 R08: 00000000bc4e1092 R09: 0000000000000000 [ 580.804498] R10: 0000000000000000 R11: 0000000000000000 R12: ffff88848c04e728 [ 580.804501] R13: 0000000000000214 R14: ffff88848c04e720 R15: ffff888486eb2c68 [ 580.804504] FS: 0000000000000000(0000) GS:ffff8884a0000000(0000) knlGS:0000000000000000 [ 580.804507] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 [ 580.804510] CR2: 00007ff6bf1ba680 CR3: 0000000005210003 CR4: 0000000000760ef0 [ 580.804512] PKRU: 55555554 [ 580.804515] Call Trace: [ 580.804574] intel_dp_mst_compute_config+0x193/0x2b0 [i915] [ 580.804636] intel_atomic_check+0x10cc/0x20b0 [i915] [ 580.804644] ? drm_atomic_print_old_state+0xf1/0x130 [ 580.804655] drm_atomic_check_only+0x56a/0x810 [ 580.804663] drm_atomic_commit+0xe/0x50 [ 580.804668] drm_client_modeset_commit_atomic+0x18b/0x220 [ 580.804680] drm_client_modeset_commit_force+0x4d/0x180 [ 580.804685] drm_fb_helper_restore_fbdev_mode_unlocked+0x46/0xa0 [ 580.804689] drm_fb_helper_set_par+0x27/0x50 [ 580.804692] drm_fb_helper_hotplug_event.part.0+0xa7/0xc0 [ 580.804696] drm_kms_helper_hotplug_event+0x21/0x30 [ 580.804699] output_poll_execute+0x1a4/0x1c0 [ 580.804706] process_one_work+0x25b/0x5b0 [ 580.804713] worker_thread+0x4b/0x3b0 [ 580.804720] kthread+0x100/0x140 [ 580.804723] ? process_one_work+0x5b0/0x5b0 [ 580.804725] ? kthread_park+0x80/0x80 [ 580.804730] ret_from_fork+0x24/0x50 [ 580.804740] irq event stamp: 40988 [ 580.804743] hardirqs last enabled at (40987): [<ffffffff81128567>] console_unlock+0x437/0x590 [ 580.804746] hardirqs last disabled at (40988): [<ffffffff81001cfa>] trace_hardirqs_off_thunk+0x1a/0x20 [ 580.804749] softirqs last enabled at (40972): [<ffffffff81c00389>] __do_softirq+0x389/0x47f [ 580.804752] softirqs last disabled at (40959): [<ffffffff810b6f19>] irq_exit+0xa9/0xc0 [ 580.804754] ---[ end trace 80052e0c60463c67 ]--- [ 580.804758] [drm:drm_dp_atomic_find_vcpi_slots] *ERROR* cannot allocate and release VCPI on [MST PORT:000000007880692e] in the same state [ 580.811370] [drm:intel_dp_hpd_pulse [i915]] got esi2 02 00 00 [ 580.817239] [drm:intel_dp_hpd_pulse [i915]] got esi 02 00 00 [ 580.817313] ------------[ cut here ]------------ [ 580.817318] WARNING: CPU: 0 PID: 1221 at drivers/gpu/drm/drm_dp_mst_topology.c:4094 drm_dp_atomic_find_vcpi_slots+0x157/0x180 [ 580.817321] Modules linked in: cdc_ether r8152 i915 prime_numbers snd_hda_codec_hdmi snd_hda_intel snd_intel_dspcfg snd_hda_codec snd_hwdep asix snd_hda_core x86_pkg_temp_thermal [ 580.817412] [drm:intel_dp_hpd_pulse [i915]] got hpd irq on [ENCODER:306:DDI E] - short [ 580.817413] usbnet mei_hdcp coretemp mii mei_me crct10dif_pclmul snd_pcm crc32_pclmul [ 580.817490] [drm:intel_dp_hpd_pulse [i915]] is_mst [ 580.817491] mei ghash_clmulni_intel i2c_i801 [last unloaded: prime_numbers] [ 580.817498] CPU: 0 PID: 1221 Comm: kworker/0:0 Tainted: G W 5.4.0-rc7-zeh+ #1226 [ 580.817503] Hardware name: Intel Corporation Tiger Lake Client Platform/TigerLake U DDR4 SODIMM RVP, BIOS TGLSFWI1.D00.2321.A09.1909250226 09/25/2019 [ 580.817506] Workqueue: events output_poll_execute [ 580.817511] RIP: 0010:drm_dp_atomic_find_vcpi_slots+0x157/0x180 [ 580.817514] Code: 6a ff ff ff 49 89 6d 08 4c 89 6b 10 4c 89 63 18 49 89 6e 08 e9 55 ff ff ff 41 89 c7 5b 5d 44 89 f8 41 5c 41 5d 41 5e 41 5f c3 <0f> 0b 48 c7 c7 08 73 11 82 48 89 ee 41 bf ea ff ff ff e8 b2 e3 02 [ 580.817516] RSP: 0018:ffffc900009b7ab8 EFLAGS: 00010246 [ 580.817519] RAX: ffff88848c04ef50 RBX: ffff88848c04ef40 RCX: 000000000000018f [ 580.817521] RDX: ffff88848c04f5e0 RSI: ffff888486eb2c68 RDI: ffff88848e518800 [ 580.817523] RBP: ffff88849d339000 R08: 00000000bc4e1092 R09: 0000000000000000 [ 580.817525] R10: 0000000000000000 R11: 0000000000000000 R12: ffff88848c04e728 [ 580.817528] R13: 000000000000018f R14: ffff88848c04e720 R15: ffff888486eb2c68 [ 580.817532] FS: 0000000000000000(0000) GS:ffff8884a0000000(0000) knlGS:0000000000000000 [ 580.817534] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 [ 580.817535] CR2: 00007ff6bf1ba680 CR3: 0000000005210003 CR4: 0000000000760ef0 [ 580.817537] PKRU: 55555554 [ 580.817538] Call Trace: [ 580.817620] intel_dp_mst_compute_config+0x193/0x2b0 [i915] [ 580.817690] intel_atomic_check+0x10cc/0x20b0 [i915] [ 580.817697] ? drm_atomic_print_old_state+0xf1/0x130 [ 580.817711] drm_atomic_check_only+0x56a/0x810 [ 580.817721] drm_atomic_commit+0xe/0x50 [ 580.817726] drm_client_modeset_commit_atomic+0x18b/0x220 [ 580.817744] drm_client_modeset_commit_force+0x4d/0x180 [ 580.817751] drm_fb_helper_restore_fbdev_mode_unlocked+0x46/0xa0 [ 580.817756] drm_fb_helper_set_par+0x27/0x50 [ 580.817762] drm_fb_helper_hotplug_event.part.0+0xa7/0xc0 [ 580.817767] drm_kms_helper_hotplug_event+0x21/0x30 [ 580.817771] output_poll_execute+0x1a4/0x1c0 [ 580.817780] process_one_work+0x25b/0x5b0 [ 580.817791] worker_thread+0x4b/0x3b0 [ 580.817800] kthread+0x100/0x140 [ 580.817804] ? process_one_work+0x5b0/0x5b0 [ 580.817807] ? kthread_park+0x80/0x80 [ 580.817813] ret_from_fork+0x24/0x50 [ 580.817832] irq event stamp: 41028 [ 580.817838] hardirqs last enabled at (41027): [<ffffffff81128567>] console_unlock+0x437/0x590 [ 580.817841] hardirqs last disabled at (41028): [<ffffffff81001cfa>] trace_hardirqs_off_thunk+0x1a/0x20 [ 580.817846] softirqs last enabled at (41022): [<ffffffff81c00389>] __do_softirq+0x389/0x47f [ 580.817851] softirqs last disabled at (41013): [<ffffffff810b6f19>] irq_exit+0xa9/0xc0 [ 580.817854] ---[ end trace 80052e0c60463c68 ]--- [ 580.817858] [drm:drm_dp_atomic_find_vcpi_slots] *ERROR* cannot allocate and release VCPI on [MST PORT:000000007880692e] in the same state [ 580.830767] [drm:intel_dp_mst_compute_config [i915]] failed finding vcpi slots:-22 [ 580.830821] [drm:intel_atomic_check [i915]] Encoder config failure: -22 Cc: Lyude Paul <lyude@redhat.com> Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: Lucas De Marchi <lucas.demarchi@intel.com> Signed-off-by: José Roberto de Souza <jose.souza@intel.com> Reviewed-by: Lyude Paul <lyude@redhat.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20191115200430.53146-1-jose.souza@intel.com
720 lines
23 KiB
C
720 lines
23 KiB
C
/*
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* Copyright © 2008 Intel Corporation
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* 2014 Red Hat Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*
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*/
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#include <drm/drm_atomic_helper.h>
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#include <drm/drm_edid.h>
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#include <drm/drm_probe_helper.h>
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#include "i915_drv.h"
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#include "intel_atomic.h"
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#include "intel_audio.h"
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#include "intel_connector.h"
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#include "intel_ddi.h"
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#include "intel_display_types.h"
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#include "intel_dp.h"
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#include "intel_dp_mst.h"
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#include "intel_dpio_phy.h"
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static int intel_dp_mst_compute_link_config(struct intel_encoder *encoder,
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struct intel_crtc_state *crtc_state,
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struct drm_connector_state *conn_state,
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struct link_config_limits *limits)
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{
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struct drm_atomic_state *state = crtc_state->uapi.state;
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struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
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struct intel_dp *intel_dp = &intel_mst->primary->dp;
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struct intel_connector *connector =
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to_intel_connector(conn_state->connector);
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const struct drm_display_mode *adjusted_mode =
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&crtc_state->hw.adjusted_mode;
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void *port = connector->port;
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bool constant_n = drm_dp_has_quirk(&intel_dp->desc,
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DP_DPCD_QUIRK_CONSTANT_N);
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int bpp, slots = -EINVAL;
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crtc_state->lane_count = limits->max_lane_count;
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crtc_state->port_clock = limits->max_clock;
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for (bpp = limits->max_bpp; bpp >= limits->min_bpp; bpp -= 2 * 3) {
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crtc_state->pipe_bpp = bpp;
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crtc_state->pbn = drm_dp_calc_pbn_mode(adjusted_mode->crtc_clock,
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crtc_state->pipe_bpp);
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slots = drm_dp_atomic_find_vcpi_slots(state, &intel_dp->mst_mgr,
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port, crtc_state->pbn);
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if (slots == -EDEADLK)
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return slots;
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if (slots >= 0)
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break;
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}
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if (slots < 0) {
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DRM_DEBUG_KMS("failed finding vcpi slots:%d\n", slots);
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return slots;
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}
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intel_link_compute_m_n(crtc_state->pipe_bpp,
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crtc_state->lane_count,
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adjusted_mode->crtc_clock,
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crtc_state->port_clock,
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&crtc_state->dp_m_n,
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constant_n, crtc_state->fec_enable);
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crtc_state->dp_m_n.tu = slots;
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return 0;
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}
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static int intel_dp_mst_compute_config(struct intel_encoder *encoder,
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struct intel_crtc_state *pipe_config,
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struct drm_connector_state *conn_state)
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{
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struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
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struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
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struct intel_dp *intel_dp = &intel_mst->primary->dp;
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struct intel_connector *connector =
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to_intel_connector(conn_state->connector);
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struct intel_digital_connector_state *intel_conn_state =
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to_intel_digital_connector_state(conn_state);
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const struct drm_display_mode *adjusted_mode =
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&pipe_config->hw.adjusted_mode;
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void *port = connector->port;
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struct link_config_limits limits;
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int ret;
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if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
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return -EINVAL;
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pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
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pipe_config->has_pch_encoder = false;
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if (intel_conn_state->force_audio == HDMI_AUDIO_AUTO)
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pipe_config->has_audio =
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drm_dp_mst_port_has_audio(&intel_dp->mst_mgr, port);
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else
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pipe_config->has_audio =
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intel_conn_state->force_audio == HDMI_AUDIO_ON;
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/*
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* for MST we always configure max link bw - the spec doesn't
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* seem to suggest we should do otherwise.
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*/
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limits.min_clock =
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limits.max_clock = intel_dp_max_link_rate(intel_dp);
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limits.min_lane_count =
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limits.max_lane_count = intel_dp_max_lane_count(intel_dp);
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limits.min_bpp = intel_dp_min_bpp(pipe_config);
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/*
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* FIXME: If all the streams can't fit into the link with
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* their current pipe_bpp we should reduce pipe_bpp across
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* the board until things start to fit. Until then we
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* limit to <= 8bpc since that's what was hardcoded for all
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* MST streams previously. This hack should be removed once
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* we have the proper retry logic in place.
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*/
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limits.max_bpp = min(pipe_config->pipe_bpp, 24);
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intel_dp_adjust_compliance_config(intel_dp, pipe_config, &limits);
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ret = intel_dp_mst_compute_link_config(encoder, pipe_config,
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conn_state, &limits);
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if (ret)
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return ret;
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pipe_config->limited_color_range =
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intel_dp_limited_color_range(pipe_config, conn_state);
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if (IS_GEN9_LP(dev_priv))
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pipe_config->lane_lat_optim_mask =
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bxt_ddi_phy_calc_lane_lat_optim_mask(pipe_config->lane_count);
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intel_ddi_compute_min_voltage_level(dev_priv, pipe_config);
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return 0;
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}
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static int
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intel_dp_mst_atomic_check(struct drm_connector *connector,
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struct drm_atomic_state *state)
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{
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struct drm_connector_state *new_conn_state =
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drm_atomic_get_new_connector_state(state, connector);
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struct drm_connector_state *old_conn_state =
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drm_atomic_get_old_connector_state(state, connector);
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struct intel_connector *intel_connector =
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to_intel_connector(connector);
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struct drm_crtc *new_crtc = new_conn_state->crtc;
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struct drm_dp_mst_topology_mgr *mgr;
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int ret;
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ret = intel_digital_connector_atomic_check(connector, state);
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if (ret)
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return ret;
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if (!old_conn_state->crtc)
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return 0;
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/* We only want to free VCPI if this state disables the CRTC on this
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* connector
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*/
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if (new_crtc) {
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struct intel_atomic_state *intel_state =
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to_intel_atomic_state(state);
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struct intel_crtc *intel_crtc = to_intel_crtc(new_crtc);
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struct intel_crtc_state *crtc_state =
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intel_atomic_get_new_crtc_state(intel_state,
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intel_crtc);
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if (!crtc_state ||
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!drm_atomic_crtc_needs_modeset(&crtc_state->uapi) ||
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crtc_state->uapi.enable)
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return 0;
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}
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mgr = &enc_to_mst(old_conn_state->best_encoder)->primary->dp.mst_mgr;
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ret = drm_dp_atomic_release_vcpi_slots(state, mgr,
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intel_connector->port);
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return ret;
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}
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static void intel_mst_disable_dp(struct intel_encoder *encoder,
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const struct intel_crtc_state *old_crtc_state,
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const struct drm_connector_state *old_conn_state)
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{
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struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
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struct intel_digital_port *intel_dig_port = intel_mst->primary;
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struct intel_dp *intel_dp = &intel_dig_port->dp;
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struct intel_connector *connector =
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to_intel_connector(old_conn_state->connector);
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int ret;
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DRM_DEBUG_KMS("active links %d\n", intel_dp->active_mst_links);
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drm_dp_mst_reset_vcpi_slots(&intel_dp->mst_mgr, connector->port);
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ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr);
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if (ret) {
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DRM_DEBUG_KMS("failed to update payload %d\n", ret);
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}
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if (old_crtc_state->has_audio)
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intel_audio_codec_disable(encoder,
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old_crtc_state, old_conn_state);
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}
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static void intel_mst_post_disable_dp(struct intel_encoder *encoder,
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const struct intel_crtc_state *old_crtc_state,
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const struct drm_connector_state *old_conn_state)
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{
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struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
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struct intel_digital_port *intel_dig_port = intel_mst->primary;
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struct intel_dp *intel_dp = &intel_dig_port->dp;
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struct intel_connector *connector =
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to_intel_connector(old_conn_state->connector);
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intel_ddi_disable_pipe_clock(old_crtc_state);
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/* this can fail */
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drm_dp_check_act_status(&intel_dp->mst_mgr);
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/* and this can also fail */
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drm_dp_update_payload_part2(&intel_dp->mst_mgr);
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drm_dp_mst_deallocate_vcpi(&intel_dp->mst_mgr, connector->port);
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/*
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* Power down mst path before disabling the port, otherwise we end
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* up getting interrupts from the sink upon detecting link loss.
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*/
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drm_dp_send_power_updown_phy(&intel_dp->mst_mgr, connector->port,
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false);
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intel_dp->active_mst_links--;
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intel_mst->connector = NULL;
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if (intel_dp->active_mst_links == 0) {
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intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_OFF);
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intel_dig_port->base.post_disable(&intel_dig_port->base,
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old_crtc_state, NULL);
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}
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DRM_DEBUG_KMS("active links %d\n", intel_dp->active_mst_links);
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}
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static void intel_mst_pre_pll_enable_dp(struct intel_encoder *encoder,
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const struct intel_crtc_state *pipe_config,
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const struct drm_connector_state *conn_state)
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{
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struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
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struct intel_digital_port *intel_dig_port = intel_mst->primary;
|
|
struct intel_dp *intel_dp = &intel_dig_port->dp;
|
|
|
|
if (intel_dp->active_mst_links == 0)
|
|
intel_dig_port->base.pre_pll_enable(&intel_dig_port->base,
|
|
pipe_config, NULL);
|
|
}
|
|
|
|
static void intel_mst_post_pll_disable_dp(struct intel_encoder *encoder,
|
|
const struct intel_crtc_state *old_crtc_state,
|
|
const struct drm_connector_state *old_conn_state)
|
|
{
|
|
struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
|
|
struct intel_digital_port *intel_dig_port = intel_mst->primary;
|
|
struct intel_dp *intel_dp = &intel_dig_port->dp;
|
|
|
|
if (intel_dp->active_mst_links == 0)
|
|
intel_dig_port->base.post_pll_disable(&intel_dig_port->base,
|
|
old_crtc_state,
|
|
old_conn_state);
|
|
}
|
|
|
|
static void intel_mst_pre_enable_dp(struct intel_encoder *encoder,
|
|
const struct intel_crtc_state *pipe_config,
|
|
const struct drm_connector_state *conn_state)
|
|
{
|
|
struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
|
|
struct intel_digital_port *intel_dig_port = intel_mst->primary;
|
|
struct intel_dp *intel_dp = &intel_dig_port->dp;
|
|
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
|
|
struct intel_connector *connector =
|
|
to_intel_connector(conn_state->connector);
|
|
int ret;
|
|
u32 temp;
|
|
bool first_mst_stream;
|
|
|
|
/* MST encoders are bound to a crtc, not to a connector,
|
|
* force the mapping here for get_hw_state.
|
|
*/
|
|
connector->encoder = encoder;
|
|
intel_mst->connector = connector;
|
|
first_mst_stream = intel_dp->active_mst_links == 0;
|
|
|
|
DRM_DEBUG_KMS("active links %d\n", intel_dp->active_mst_links);
|
|
|
|
if (first_mst_stream)
|
|
intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON);
|
|
|
|
drm_dp_send_power_updown_phy(&intel_dp->mst_mgr, connector->port, true);
|
|
|
|
if (first_mst_stream)
|
|
intel_dig_port->base.pre_enable(&intel_dig_port->base,
|
|
pipe_config, NULL);
|
|
|
|
ret = drm_dp_mst_allocate_vcpi(&intel_dp->mst_mgr,
|
|
connector->port,
|
|
pipe_config->pbn,
|
|
pipe_config->dp_m_n.tu);
|
|
if (!ret)
|
|
DRM_ERROR("failed to allocate vcpi\n");
|
|
|
|
intel_dp->active_mst_links++;
|
|
temp = I915_READ(intel_dp->regs.dp_tp_status);
|
|
I915_WRITE(intel_dp->regs.dp_tp_status, temp);
|
|
|
|
ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr);
|
|
|
|
/*
|
|
* Before Gen 12 this is not done as part of
|
|
* intel_dig_port->base.pre_enable() and should be done here. For
|
|
* Gen 12+ the step in which this should be done is different for the
|
|
* first MST stream, so it's done on the DDI for the first stream and
|
|
* here for the following ones.
|
|
*/
|
|
if (INTEL_GEN(dev_priv) < 12 || !first_mst_stream)
|
|
intel_ddi_enable_pipe_clock(pipe_config);
|
|
|
|
intel_ddi_set_dp_msa(pipe_config, conn_state);
|
|
}
|
|
|
|
static void intel_mst_enable_dp(struct intel_encoder *encoder,
|
|
const struct intel_crtc_state *pipe_config,
|
|
const struct drm_connector_state *conn_state)
|
|
{
|
|
struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
|
|
struct intel_digital_port *intel_dig_port = intel_mst->primary;
|
|
struct intel_dp *intel_dp = &intel_dig_port->dp;
|
|
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
|
|
|
|
DRM_DEBUG_KMS("active links %d\n", intel_dp->active_mst_links);
|
|
|
|
if (intel_de_wait_for_set(dev_priv, intel_dp->regs.dp_tp_status,
|
|
DP_TP_STATUS_ACT_SENT, 1))
|
|
DRM_ERROR("Timed out waiting for ACT sent\n");
|
|
|
|
drm_dp_check_act_status(&intel_dp->mst_mgr);
|
|
|
|
drm_dp_update_payload_part2(&intel_dp->mst_mgr);
|
|
if (pipe_config->has_audio)
|
|
intel_audio_codec_enable(encoder, pipe_config, conn_state);
|
|
}
|
|
|
|
static bool intel_dp_mst_enc_get_hw_state(struct intel_encoder *encoder,
|
|
enum pipe *pipe)
|
|
{
|
|
struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
|
|
*pipe = intel_mst->pipe;
|
|
if (intel_mst->connector)
|
|
return true;
|
|
return false;
|
|
}
|
|
|
|
static void intel_dp_mst_enc_get_config(struct intel_encoder *encoder,
|
|
struct intel_crtc_state *pipe_config)
|
|
{
|
|
struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
|
|
struct intel_digital_port *intel_dig_port = intel_mst->primary;
|
|
|
|
intel_ddi_get_config(&intel_dig_port->base, pipe_config);
|
|
}
|
|
|
|
static int intel_dp_mst_get_ddc_modes(struct drm_connector *connector)
|
|
{
|
|
struct intel_connector *intel_connector = to_intel_connector(connector);
|
|
struct intel_dp *intel_dp = intel_connector->mst_port;
|
|
struct edid *edid;
|
|
int ret;
|
|
|
|
if (drm_connector_is_unregistered(connector))
|
|
return intel_connector_update_modes(connector, NULL);
|
|
|
|
edid = drm_dp_mst_get_edid(connector, &intel_dp->mst_mgr, intel_connector->port);
|
|
ret = intel_connector_update_modes(connector, edid);
|
|
kfree(edid);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static const struct drm_connector_funcs intel_dp_mst_connector_funcs = {
|
|
.fill_modes = drm_helper_probe_single_connector_modes,
|
|
.atomic_get_property = intel_digital_connector_atomic_get_property,
|
|
.atomic_set_property = intel_digital_connector_atomic_set_property,
|
|
.late_register = intel_connector_register,
|
|
.early_unregister = intel_connector_unregister,
|
|
.destroy = intel_connector_destroy,
|
|
.atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
|
|
.atomic_duplicate_state = intel_digital_connector_duplicate_state,
|
|
};
|
|
|
|
static int intel_dp_mst_get_modes(struct drm_connector *connector)
|
|
{
|
|
return intel_dp_mst_get_ddc_modes(connector);
|
|
}
|
|
|
|
static enum drm_mode_status
|
|
intel_dp_mst_mode_valid(struct drm_connector *connector,
|
|
struct drm_display_mode *mode)
|
|
{
|
|
struct drm_i915_private *dev_priv = to_i915(connector->dev);
|
|
struct intel_connector *intel_connector = to_intel_connector(connector);
|
|
struct intel_dp *intel_dp = intel_connector->mst_port;
|
|
int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
|
|
int max_rate, mode_rate, max_lanes, max_link_clock;
|
|
|
|
if (drm_connector_is_unregistered(connector))
|
|
return MODE_ERROR;
|
|
|
|
if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
|
|
return MODE_NO_DBLESCAN;
|
|
|
|
max_link_clock = intel_dp_max_link_rate(intel_dp);
|
|
max_lanes = intel_dp_max_lane_count(intel_dp);
|
|
|
|
max_rate = intel_dp_max_data_rate(max_link_clock, max_lanes);
|
|
mode_rate = intel_dp_link_required(mode->clock, 18);
|
|
|
|
/* TODO - validate mode against available PBN for link */
|
|
if (mode->clock < 10000)
|
|
return MODE_CLOCK_LOW;
|
|
|
|
if (mode->flags & DRM_MODE_FLAG_DBLCLK)
|
|
return MODE_H_ILLEGAL;
|
|
|
|
if (mode_rate > max_rate || mode->clock > max_dotclk)
|
|
return MODE_CLOCK_HIGH;
|
|
|
|
return intel_mode_valid_max_plane_size(dev_priv, mode);
|
|
}
|
|
|
|
static struct drm_encoder *intel_mst_atomic_best_encoder(struct drm_connector *connector,
|
|
struct drm_connector_state *state)
|
|
{
|
|
struct intel_connector *intel_connector = to_intel_connector(connector);
|
|
struct intel_dp *intel_dp = intel_connector->mst_port;
|
|
struct intel_crtc *crtc = to_intel_crtc(state->crtc);
|
|
|
|
return &intel_dp->mst_encoders[crtc->pipe]->base.base;
|
|
}
|
|
|
|
static int
|
|
intel_dp_mst_detect(struct drm_connector *connector,
|
|
struct drm_modeset_acquire_ctx *ctx, bool force)
|
|
{
|
|
struct intel_connector *intel_connector = to_intel_connector(connector);
|
|
struct intel_dp *intel_dp = intel_connector->mst_port;
|
|
|
|
if (drm_connector_is_unregistered(connector))
|
|
return connector_status_disconnected;
|
|
|
|
return drm_dp_mst_detect_port(connector, ctx, &intel_dp->mst_mgr,
|
|
intel_connector->port);
|
|
}
|
|
|
|
static const struct drm_connector_helper_funcs intel_dp_mst_connector_helper_funcs = {
|
|
.get_modes = intel_dp_mst_get_modes,
|
|
.mode_valid = intel_dp_mst_mode_valid,
|
|
.atomic_best_encoder = intel_mst_atomic_best_encoder,
|
|
.atomic_check = intel_dp_mst_atomic_check,
|
|
.detect_ctx = intel_dp_mst_detect,
|
|
};
|
|
|
|
static void intel_dp_mst_encoder_destroy(struct drm_encoder *encoder)
|
|
{
|
|
struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
|
|
|
|
drm_encoder_cleanup(encoder);
|
|
kfree(intel_mst);
|
|
}
|
|
|
|
static const struct drm_encoder_funcs intel_dp_mst_enc_funcs = {
|
|
.destroy = intel_dp_mst_encoder_destroy,
|
|
};
|
|
|
|
static bool intel_dp_mst_get_hw_state(struct intel_connector *connector)
|
|
{
|
|
if (connector->encoder && connector->base.state->crtc) {
|
|
enum pipe pipe;
|
|
if (!connector->encoder->get_hw_state(connector->encoder, &pipe))
|
|
return false;
|
|
return true;
|
|
}
|
|
return false;
|
|
}
|
|
|
|
static struct drm_connector *intel_dp_add_mst_connector(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port, const char *pathprop)
|
|
{
|
|
struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst_mgr);
|
|
struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
|
|
struct drm_device *dev = intel_dig_port->base.base.dev;
|
|
struct drm_i915_private *dev_priv = to_i915(dev);
|
|
struct intel_connector *intel_connector;
|
|
struct drm_connector *connector;
|
|
enum pipe pipe;
|
|
int ret;
|
|
|
|
intel_connector = intel_connector_alloc();
|
|
if (!intel_connector)
|
|
return NULL;
|
|
|
|
intel_connector->get_hw_state = intel_dp_mst_get_hw_state;
|
|
intel_connector->mst_port = intel_dp;
|
|
intel_connector->port = port;
|
|
drm_dp_mst_get_port_malloc(port);
|
|
|
|
connector = &intel_connector->base;
|
|
ret = drm_connector_init(dev, connector, &intel_dp_mst_connector_funcs,
|
|
DRM_MODE_CONNECTOR_DisplayPort);
|
|
if (ret) {
|
|
intel_connector_free(intel_connector);
|
|
return NULL;
|
|
}
|
|
|
|
drm_connector_helper_add(connector, &intel_dp_mst_connector_helper_funcs);
|
|
|
|
for_each_pipe(dev_priv, pipe) {
|
|
struct drm_encoder *enc =
|
|
&intel_dp->mst_encoders[pipe]->base.base;
|
|
|
|
ret = drm_connector_attach_encoder(&intel_connector->base, enc);
|
|
if (ret)
|
|
goto err;
|
|
}
|
|
|
|
drm_object_attach_property(&connector->base, dev->mode_config.path_property, 0);
|
|
drm_object_attach_property(&connector->base, dev->mode_config.tile_property, 0);
|
|
|
|
ret = drm_connector_set_path_property(connector, pathprop);
|
|
if (ret)
|
|
goto err;
|
|
|
|
intel_attach_force_audio_property(connector);
|
|
intel_attach_broadcast_rgb_property(connector);
|
|
|
|
/*
|
|
* Reuse the prop from the SST connector because we're
|
|
* not allowed to create new props after device registration.
|
|
*/
|
|
connector->max_bpc_property =
|
|
intel_dp->attached_connector->base.max_bpc_property;
|
|
if (connector->max_bpc_property)
|
|
drm_connector_attach_max_bpc_property(connector, 6, 12);
|
|
|
|
return connector;
|
|
|
|
err:
|
|
drm_connector_cleanup(connector);
|
|
return NULL;
|
|
}
|
|
|
|
static void intel_dp_register_mst_connector(struct drm_connector *connector)
|
|
{
|
|
struct drm_i915_private *dev_priv = to_i915(connector->dev);
|
|
|
|
if (dev_priv->fbdev)
|
|
drm_fb_helper_add_one_connector(&dev_priv->fbdev->helper,
|
|
connector);
|
|
|
|
drm_connector_register(connector);
|
|
}
|
|
|
|
static void intel_dp_destroy_mst_connector(struct drm_dp_mst_topology_mgr *mgr,
|
|
struct drm_connector *connector)
|
|
{
|
|
struct drm_i915_private *dev_priv = to_i915(connector->dev);
|
|
|
|
DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n", connector->base.id, connector->name);
|
|
drm_connector_unregister(connector);
|
|
|
|
if (dev_priv->fbdev)
|
|
drm_fb_helper_remove_one_connector(&dev_priv->fbdev->helper,
|
|
connector);
|
|
|
|
drm_connector_put(connector);
|
|
}
|
|
|
|
static const struct drm_dp_mst_topology_cbs mst_cbs = {
|
|
.add_connector = intel_dp_add_mst_connector,
|
|
.register_connector = intel_dp_register_mst_connector,
|
|
.destroy_connector = intel_dp_destroy_mst_connector,
|
|
};
|
|
|
|
static struct intel_dp_mst_encoder *
|
|
intel_dp_create_fake_mst_encoder(struct intel_digital_port *intel_dig_port, enum pipe pipe)
|
|
{
|
|
struct intel_dp_mst_encoder *intel_mst;
|
|
struct intel_encoder *intel_encoder;
|
|
struct drm_device *dev = intel_dig_port->base.base.dev;
|
|
|
|
intel_mst = kzalloc(sizeof(*intel_mst), GFP_KERNEL);
|
|
|
|
if (!intel_mst)
|
|
return NULL;
|
|
|
|
intel_mst->pipe = pipe;
|
|
intel_encoder = &intel_mst->base;
|
|
intel_mst->primary = intel_dig_port;
|
|
|
|
drm_encoder_init(dev, &intel_encoder->base, &intel_dp_mst_enc_funcs,
|
|
DRM_MODE_ENCODER_DPMST, "DP-MST %c", pipe_name(pipe));
|
|
|
|
intel_encoder->type = INTEL_OUTPUT_DP_MST;
|
|
intel_encoder->power_domain = intel_dig_port->base.power_domain;
|
|
intel_encoder->port = intel_dig_port->base.port;
|
|
intel_encoder->cloneable = 0;
|
|
/*
|
|
* This is wrong, but broken userspace uses the intersection
|
|
* of possible_crtcs of all the encoders of a given connector
|
|
* to figure out which crtcs can drive said connector. What
|
|
* should be used instead is the union of possible_crtcs.
|
|
* To keep such userspace functioning we must misconfigure
|
|
* this to make sure the intersection is not empty :(
|
|
*/
|
|
intel_encoder->pipe_mask = ~0;
|
|
|
|
intel_encoder->compute_config = intel_dp_mst_compute_config;
|
|
intel_encoder->disable = intel_mst_disable_dp;
|
|
intel_encoder->post_disable = intel_mst_post_disable_dp;
|
|
intel_encoder->pre_pll_enable = intel_mst_pre_pll_enable_dp;
|
|
intel_encoder->post_pll_disable = intel_mst_post_pll_disable_dp;
|
|
intel_encoder->pre_enable = intel_mst_pre_enable_dp;
|
|
intel_encoder->enable = intel_mst_enable_dp;
|
|
intel_encoder->get_hw_state = intel_dp_mst_enc_get_hw_state;
|
|
intel_encoder->get_config = intel_dp_mst_enc_get_config;
|
|
|
|
return intel_mst;
|
|
|
|
}
|
|
|
|
static bool
|
|
intel_dp_create_fake_mst_encoders(struct intel_digital_port *intel_dig_port)
|
|
{
|
|
struct intel_dp *intel_dp = &intel_dig_port->dp;
|
|
struct drm_i915_private *dev_priv = to_i915(intel_dig_port->base.base.dev);
|
|
enum pipe pipe;
|
|
|
|
for_each_pipe(dev_priv, pipe)
|
|
intel_dp->mst_encoders[pipe] = intel_dp_create_fake_mst_encoder(intel_dig_port, pipe);
|
|
return true;
|
|
}
|
|
|
|
int
|
|
intel_dp_mst_encoder_active_links(struct intel_digital_port *intel_dig_port)
|
|
{
|
|
return intel_dig_port->dp.active_mst_links;
|
|
}
|
|
|
|
int
|
|
intel_dp_mst_encoder_init(struct intel_digital_port *intel_dig_port, int conn_base_id)
|
|
{
|
|
struct drm_i915_private *i915 = to_i915(intel_dig_port->base.base.dev);
|
|
struct intel_dp *intel_dp = &intel_dig_port->dp;
|
|
enum port port = intel_dig_port->base.port;
|
|
int ret;
|
|
|
|
if (!HAS_DP_MST(i915) || intel_dp_is_edp(intel_dp))
|
|
return 0;
|
|
|
|
if (INTEL_GEN(i915) < 12 && port == PORT_A)
|
|
return 0;
|
|
|
|
if (INTEL_GEN(i915) < 11 && port == PORT_E)
|
|
return 0;
|
|
|
|
intel_dp->mst_mgr.cbs = &mst_cbs;
|
|
|
|
/* create encoders */
|
|
intel_dp_create_fake_mst_encoders(intel_dig_port);
|
|
ret = drm_dp_mst_topology_mgr_init(&intel_dp->mst_mgr, &i915->drm,
|
|
&intel_dp->aux, 16, 3, conn_base_id);
|
|
if (ret)
|
|
return ret;
|
|
|
|
intel_dp->can_mst = true;
|
|
|
|
return 0;
|
|
}
|
|
|
|
void
|
|
intel_dp_mst_encoder_cleanup(struct intel_digital_port *intel_dig_port)
|
|
{
|
|
struct intel_dp *intel_dp = &intel_dig_port->dp;
|
|
|
|
if (!intel_dp->can_mst)
|
|
return;
|
|
|
|
drm_dp_mst_topology_mgr_destroy(&intel_dp->mst_mgr);
|
|
/* encoders will get killed by normal cleanup */
|
|
}
|