Bruce Allan c5083cf6d2 e1000e: convert head, tail and itr_register offsets to __iomem pointers ... The Tx/Rx head and tail registers and itr_register are always at known addresses based on the __iomem address at which the PCI region (from BAR 0) is mapped and known offsets within the region for each of these registers. Store and use the full address rather than just the region offset to reduce unnecessary address calculations. Also, change current u8 __iomem pointers to void __iomem pointers. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>		2012-01-25 23:12:13 -08:00
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e1000	e1000: cleanup CE4100 MDIO registers access	2012-01-05 13:12:03 -05:00
e1000e	e1000e: convert head, tail and itr_register offsets to __iomem pointers	2012-01-25 23:12:13 -08:00
igb	igb: Update Copyright on all Intel copyrighted files.	2012-01-19 12:35:06 -05:00
igbvf	igbvf: Remove unnecessary irq disable/enable	2012-01-19 12:35:06 -05:00
ixgb	net: fix assignment of 0/1 to bool variables.	2011-12-19 22:27:29 -05:00
ixgbe	ixgbe: Fix register defines to correctly handle complex expressions	2012-01-19 12:35:06 -05:00
ixgbevf	ixgbevf: make operations tables const	2012-01-19 12:35:07 -05:00
e100.c	Sweep away N/A fw_version dustbunnies from the .get_drvinfo routine of a number of drivers	2011-11-22 16:43:32 -05:00
Kconfig	i825xx:xscale:8390:freescale: Fix Kconfig dependancies	2011-11-04 17:41:20 -04:00
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