forked from Minki/linux
3c904afd73
The SIO chip contains 16 possible gpio lines, not 14. The schematic was not read carefully. Signed-off-by: Denis Turischev <denis@compulab.co.il> Cc: David Brownell <david-b@pacbell.net> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
232 lines
4.7 KiB
C
232 lines
4.7 KiB
C
/*
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* it8761_gpio.c - GPIO interface for IT8761E Super I/O chip
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*
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* Author: Denis Turischev <denis@compulab.co.il>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License 2 as published
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* by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; see the file COPYING. If not, write to
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* the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/io.h>
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#include <linux/errno.h>
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#include <linux/ioport.h>
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#include <linux/gpio.h>
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#define SIO_CHIP_ID 0x8761
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#define CHIP_ID_HIGH_BYTE 0x20
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#define CHIP_ID_LOW_BYTE 0x21
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static u8 ports[2] = { 0x2e, 0x4e };
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static u8 port;
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static DEFINE_SPINLOCK(sio_lock);
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#define GPIO_NAME "it8761-gpio"
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#define GPIO_BA_HIGH_BYTE 0x60
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#define GPIO_BA_LOW_BYTE 0x61
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#define GPIO_IOSIZE 4
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#define GPIO1X_IO 0xf0
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#define GPIO2X_IO 0xf1
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static u16 gpio_ba;
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static u8 read_reg(u8 addr, u8 port)
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{
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outb(addr, port);
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return inb(port + 1);
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}
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static void write_reg(u8 data, u8 addr, u8 port)
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{
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outb(addr, port);
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outb(data, port + 1);
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}
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static void enter_conf_mode(u8 port)
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{
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outb(0x87, port);
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outb(0x61, port);
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outb(0x55, port);
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outb((port == 0x2e) ? 0x55 : 0xaa, port);
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}
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static void exit_conf_mode(u8 port)
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{
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outb(0x2, port);
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outb(0x2, port + 1);
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}
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static void enter_gpio_mode(u8 port)
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{
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write_reg(0x2, 0x7, port);
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}
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static int it8761e_gpio_get(struct gpio_chip *gc, unsigned gpio_num)
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{
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u16 reg;
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u8 bit;
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bit = gpio_num % 8;
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reg = (gpio_num >= 8) ? gpio_ba + 1 : gpio_ba;
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return !!(inb(reg) & (1 << bit));
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}
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static int it8761e_gpio_direction_in(struct gpio_chip *gc, unsigned gpio_num)
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{
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u8 curr_dirs;
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u8 io_reg, bit;
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bit = gpio_num % 8;
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io_reg = (gpio_num >= 8) ? GPIO2X_IO : GPIO1X_IO;
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spin_lock(&sio_lock);
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enter_conf_mode(port);
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enter_gpio_mode(port);
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curr_dirs = read_reg(io_reg, port);
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if (curr_dirs & (1 << bit))
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write_reg(curr_dirs & ~(1 << bit), io_reg, port);
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exit_conf_mode(port);
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spin_unlock(&sio_lock);
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return 0;
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}
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static void it8761e_gpio_set(struct gpio_chip *gc,
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unsigned gpio_num, int val)
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{
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u8 curr_vals, bit;
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u16 reg;
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bit = gpio_num % 8;
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reg = (gpio_num >= 8) ? gpio_ba + 1 : gpio_ba;
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spin_lock(&sio_lock);
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curr_vals = inb(reg);
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if (val)
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outb(curr_vals | (1 << bit) , reg);
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else
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outb(curr_vals & ~(1 << bit), reg);
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spin_unlock(&sio_lock);
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}
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static int it8761e_gpio_direction_out(struct gpio_chip *gc,
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unsigned gpio_num, int val)
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{
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u8 curr_dirs, io_reg, bit;
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bit = gpio_num % 8;
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io_reg = (gpio_num >= 8) ? GPIO2X_IO : GPIO1X_IO;
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it8761e_gpio_set(gc, gpio_num, val);
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spin_lock(&sio_lock);
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enter_conf_mode(port);
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enter_gpio_mode(port);
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curr_dirs = read_reg(io_reg, port);
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if (!(curr_dirs & (1 << bit)))
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write_reg(curr_dirs | (1 << bit), io_reg, port);
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exit_conf_mode(port);
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spin_unlock(&sio_lock);
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return 0;
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}
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static struct gpio_chip it8761e_gpio_chip = {
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.label = GPIO_NAME,
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.owner = THIS_MODULE,
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.get = it8761e_gpio_get,
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.direction_input = it8761e_gpio_direction_in,
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.set = it8761e_gpio_set,
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.direction_output = it8761e_gpio_direction_out,
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};
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static int __init it8761e_gpio_init(void)
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{
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int i, id, err;
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/* chip and port detection */
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for (i = 0; i < ARRAY_SIZE(ports); i++) {
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spin_lock(&sio_lock);
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enter_conf_mode(ports[i]);
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id = (read_reg(CHIP_ID_HIGH_BYTE, ports[i]) << 8) +
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read_reg(CHIP_ID_LOW_BYTE, ports[i]);
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exit_conf_mode(ports[i]);
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spin_unlock(&sio_lock);
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if (id == SIO_CHIP_ID) {
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port = ports[i];
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break;
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}
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}
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if (!port)
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return -ENODEV;
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/* fetch GPIO base address */
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enter_conf_mode(port);
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enter_gpio_mode(port);
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gpio_ba = (read_reg(GPIO_BA_HIGH_BYTE, port) << 8) +
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read_reg(GPIO_BA_LOW_BYTE, port);
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exit_conf_mode(port);
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if (!request_region(gpio_ba, GPIO_IOSIZE, GPIO_NAME))
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return -EBUSY;
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it8761e_gpio_chip.base = -1;
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it8761e_gpio_chip.ngpio = 16;
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err = gpiochip_add(&it8761e_gpio_chip);
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if (err < 0)
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goto gpiochip_add_err;
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return 0;
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gpiochip_add_err:
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release_region(gpio_ba, GPIO_IOSIZE);
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gpio_ba = 0;
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return err;
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}
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static void __exit it8761e_gpio_exit(void)
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{
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if (gpio_ba) {
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gpiochip_remove(&it8761e_gpio_chip);
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release_region(gpio_ba, GPIO_IOSIZE);
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gpio_ba = 0;
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}
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}
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module_init(it8761e_gpio_init);
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module_exit(it8761e_gpio_exit);
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MODULE_AUTHOR("Denis Turischev <denis@compulab.co.il>");
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MODULE_DESCRIPTION("GPIO interface for IT8761E Super I/O chip");
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MODULE_LICENSE("GPL");
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