32e2eae23f
Most of the driver-specific documentation is meant to help users of the media subsystem. Move them to the admin-guide. It should be noticed, however, that several of those files are outdated and will require further work in order to make them useful again. Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
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186 lines
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.. SPDX-License-Identifier: GPL-2.0
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.. include:: <isonum.txt>
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Qualcomm Camera Subsystem driver
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================================
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Introduction
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------------
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This file documents the Qualcomm Camera Subsystem driver located under
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drivers/media/platform/qcom/camss.
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The current version of the driver supports the Camera Subsystem found on
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Qualcomm MSM8916/APQ8016 and MSM8996/APQ8096 processors.
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The driver implements V4L2, Media controller and V4L2 subdev interfaces.
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Camera sensor using V4L2 subdev interface in the kernel is supported.
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The driver is implemented using as a reference the Qualcomm Camera Subsystem
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driver for Android as found in Code Aurora [#f1]_ [#f2]_.
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Qualcomm Camera Subsystem hardware
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----------------------------------
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The Camera Subsystem hardware found on 8x16 / 8x96 processors and supported by
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the driver consists of:
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- 2 / 3 CSIPHY modules. They handle the Physical layer of the CSI2 receivers.
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A separate camera sensor can be connected to each of the CSIPHY module;
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- 2 / 4 CSID (CSI Decoder) modules. They handle the Protocol and Application
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layer of the CSI2 receivers. A CSID can decode data stream from any of the
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CSIPHY. Each CSID also contains a TG (Test Generator) block which can generate
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artificial input data for test purposes;
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- ISPIF (ISP Interface) module. Handles the routing of the data streams from
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the CSIDs to the inputs of the VFE;
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- 1 / 2 VFE (Video Front End) module(s). Contain a pipeline of image processing
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hardware blocks. The VFE has different input interfaces. The PIX (Pixel) input
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interface feeds the input data to the image processing pipeline. The image
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processing pipeline contains also a scale and crop module at the end. Three
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RDI (Raw Dump Interface) input interfaces bypass the image processing
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pipeline. The VFE also contains the AXI bus interface which writes the output
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data to memory.
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Supported functionality
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-----------------------
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The current version of the driver supports:
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- Input from camera sensor via CSIPHY;
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- Generation of test input data by the TG in CSID;
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- RDI interface of VFE
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- Raw dump of the input data to memory.
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Supported formats:
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- YUYV/UYVY/YVYU/VYUY (packed YUV 4:2:2 - V4L2_PIX_FMT_YUYV /
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V4L2_PIX_FMT_UYVY / V4L2_PIX_FMT_YVYU / V4L2_PIX_FMT_VYUY);
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- MIPI RAW8 (8bit Bayer RAW - V4L2_PIX_FMT_SRGGB8 /
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V4L2_PIX_FMT_SGRBG8 / V4L2_PIX_FMT_SGBRG8 / V4L2_PIX_FMT_SBGGR8);
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- MIPI RAW10 (10bit packed Bayer RAW - V4L2_PIX_FMT_SBGGR10P /
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V4L2_PIX_FMT_SGBRG10P / V4L2_PIX_FMT_SGRBG10P / V4L2_PIX_FMT_SRGGB10P /
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V4L2_PIX_FMT_Y10P);
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- MIPI RAW12 (12bit packed Bayer RAW - V4L2_PIX_FMT_SRGGB12P /
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V4L2_PIX_FMT_SGBRG12P / V4L2_PIX_FMT_SGRBG12P / V4L2_PIX_FMT_SRGGB12P).
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- (8x96 only) MIPI RAW14 (14bit packed Bayer RAW - V4L2_PIX_FMT_SRGGB14P /
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V4L2_PIX_FMT_SGBRG14P / V4L2_PIX_FMT_SGRBG14P / V4L2_PIX_FMT_SRGGB14P).
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- (8x96 only) Format conversion of the input data.
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Supported input formats:
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- MIPI RAW10 (10bit packed Bayer RAW - V4L2_PIX_FMT_SBGGR10P / V4L2_PIX_FMT_Y10P).
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Supported output formats:
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- Plain16 RAW10 (10bit unpacked Bayer RAW - V4L2_PIX_FMT_SBGGR10 / V4L2_PIX_FMT_Y10).
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- PIX interface of VFE
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- Format conversion of the input data.
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Supported input formats:
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- YUYV/UYVY/YVYU/VYUY (packed YUV 4:2:2 - V4L2_PIX_FMT_YUYV /
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V4L2_PIX_FMT_UYVY / V4L2_PIX_FMT_YVYU / V4L2_PIX_FMT_VYUY).
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Supported output formats:
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- NV12/NV21 (two plane YUV 4:2:0 - V4L2_PIX_FMT_NV12 / V4L2_PIX_FMT_NV21);
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- NV16/NV61 (two plane YUV 4:2:2 - V4L2_PIX_FMT_NV16 / V4L2_PIX_FMT_NV61).
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- (8x96 only) YUYV/UYVY/YVYU/VYUY (packed YUV 4:2:2 - V4L2_PIX_FMT_YUYV /
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V4L2_PIX_FMT_UYVY / V4L2_PIX_FMT_YVYU / V4L2_PIX_FMT_VYUY).
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- Scaling support. Configuration of the VFE Encoder Scale module
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for downscalling with ratio up to 16x.
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- Cropping support. Configuration of the VFE Encoder Crop module.
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- Concurrent and independent usage of two (8x96: three) data inputs -
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could be camera sensors and/or TG.
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Driver Architecture and Design
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------------------------------
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The driver implements the V4L2 subdev interface. With the goal to model the
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hardware links between the modules and to expose a clean, logical and usable
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interface, the driver is split into V4L2 sub-devices as follows (8x16 / 8x96):
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- 2 / 3 CSIPHY sub-devices - each CSIPHY is represented by a single sub-device;
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- 2 / 4 CSID sub-devices - each CSID is represented by a single sub-device;
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- 2 / 4 ISPIF sub-devices - ISPIF is represented by a number of sub-devices
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equal to the number of CSID sub-devices;
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- 4 / 8 VFE sub-devices - VFE is represented by a number of sub-devices equal to
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the number of the input interfaces (3 RDI and 1 PIX for each VFE).
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The considerations to split the driver in this particular way are as follows:
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- representing CSIPHY and CSID modules by a separate sub-device for each module
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allows to model the hardware links between these modules;
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- representing VFE by a separate sub-devices for each input interface allows
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to use the input interfaces concurrently and independently as this is
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supported by the hardware;
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- representing ISPIF by a number of sub-devices equal to the number of CSID
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sub-devices allows to create linear media controller pipelines when using two
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cameras simultaneously. This avoids branches in the pipelines which otherwise
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will require a) userspace and b) media framework (e.g. power on/off
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operations) to make assumptions about the data flow from a sink pad to a
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source pad on a single media entity.
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Each VFE sub-device is linked to a separate video device node.
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The media controller pipeline graph is as follows (with connected two / three
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OV5645 camera sensors):
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.. _qcom_camss_graph:
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.. kernel-figure:: qcom_camss_graph.dot
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:alt: qcom_camss_graph.dot
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:align: center
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Media pipeline graph 8x16
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.. kernel-figure:: qcom_camss_8x96_graph.dot
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:alt: qcom_camss_8x96_graph.dot
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:align: center
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Media pipeline graph 8x96
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Implementation
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--------------
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Runtime configuration of the hardware (updating settings while streaming) is
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not required to implement the currently supported functionality. The complete
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configuration on each hardware module is applied on STREAMON ioctl based on
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the current active media links, formats and controls set.
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The output size of the scaler module in the VFE is configured with the actual
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compose selection rectangle on the sink pad of the 'msm_vfe0_pix' entity.
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The crop output area of the crop module in the VFE is configured with the actual
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crop selection rectangle on the source pad of the 'msm_vfe0_pix' entity.
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Documentation
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-------------
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APQ8016 Specification:
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https://developer.qualcomm.com/download/sd410/snapdragon-410-processor-device-specification.pdf
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Referenced 2016-11-24.
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APQ8096 Specification:
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https://developer.qualcomm.com/download/sd820e/qualcomm-snapdragon-820e-processor-apq8096sge-device-specification.pdf
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Referenced 2018-06-22.
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References
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----------
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.. [#f1] https://source.codeaurora.org/quic/la/kernel/msm-3.10/
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.. [#f2] https://source.codeaurora.org/quic/la/kernel/msm-3.18/
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