788a4ee607
This patch corrects the SPDX License Identifier style in header files related to USB Serial device configuration. For C header files Documentation/process/license-rules.rst mandates C-like comments (opposed to C source files where C++ style should be used). Changes made by using a script provided by Joe Perches here: https://lkml.org/lkml/2019/2/7/46. Suggested-by: Joe Perches <joe@perches.com> Signed-off-by: Nishad Kamdar <nishadkamdar@gmail.com> Signed-off-by: Johan Hovold <johan@kernel.org>
452 lines
14 KiB
C
452 lines
14 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/************************************************************************
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*
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* IONSP.H Definitions for I/O Networks Serial Protocol
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*
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* Copyright (C) 1997-1998 Inside Out Networks, Inc.
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*
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* These definitions are used by both kernel-mode driver and the
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* peripheral firmware and MUST be kept in sync.
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*
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************************************************************************/
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/************************************************************************
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The data to and from all ports on the peripheral is multiplexed
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through a single endpoint pair (EP1 since it supports 64-byte
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MaxPacketSize). Therefore, the data, commands, and status for
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each port must be preceded by a short header identifying the
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destination port. The header also identifies the bytes that follow
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as data or as command/status info.
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Header format, first byte:
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CLLLLPPP
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--------
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| | |------ Port Number: 0-7
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| |--------- Length: MSB bits of length
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|----------- Data/Command: 0 = Data header
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1 = Cmd / Status (Cmd if OUT, Status if IN)
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This gives 2 possible formats:
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Data header: 0LLLLPPP LLLLLLLL
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============
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Where (LLLL,LLLLLLL) is 12-bit length of data that follows for
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port number (PPP). The length is 0-based (0-FFF means 0-4095
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bytes). The ~4K limit allows the host driver (which deals in
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transfer requests instead of individual packets) to write a
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large chunk of data in a single request. Note, however, that
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the length must always be <= the current TxCredits for a given
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port due to buffering limitations on the peripheral.
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Cmd/Status header: 1ccccPPP [ CCCCCCCC, Params ]...
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==================
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Where (cccc) or (cccc,CCCCCCCC) is the cmd or status identifier.
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Frequently-used values are encoded as (cccc), longer ones using
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(cccc,CCCCCCCC). Subsequent bytes are optional parameters and are
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specific to the cmd or status code. This may include a length
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for command and status codes that need variable-length parameters.
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In addition, we use another interrupt pipe (endpoint) which the host polls
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periodically for flow control information. The peripheral, when there has
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been a change, sends the following 10-byte packet:
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RRRRRRRRRRRRRRRR
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T0T0T0T0T0T0T0T0
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T1T1T1T1T1T1T1T1
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T2T2T2T2T2T2T2T2
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T3T3T3T3T3T3T3T3
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The first field is the 16-bit RxBytesAvail field, which indicates the
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number of bytes which may be read by the host from EP1. This is necessary:
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(a) because OSR2.1 has a bug which causes data loss if the peripheral returns
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fewer bytes than the host expects to read, and (b) because, on Microsoft
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platforms at least, an outstanding read posted on EP1 consumes about 35% of
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the CPU just polling the device for data.
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The next 4 fields are the 16-bit TxCredits for each port, which indicate how
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many bytes the host is allowed to send on EP1 for transmit to a given port.
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After an OPEN_PORT command, the Edgeport sends the initial TxCredits for that
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port.
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All 16-bit fields are sent in little-endian (Intel) format.
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************************************************************************/
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//
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// Define format of InterruptStatus packet returned from the
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// Interrupt pipe
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//
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struct int_status_pkt {
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__u16 RxBytesAvail; // Additional bytes available to
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// be read from Bulk IN pipe
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__u16 TxCredits[MAX_RS232_PORTS]; // Additional space available in
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// given port's TxBuffer
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};
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#define GET_INT_STATUS_SIZE(NumPorts) (sizeof(__u16) + (sizeof(__u16) * (NumPorts)))
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//
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// Define cmd/status header values and macros to extract them.
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//
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// Data: 0LLLLPPP LLLLLLLL
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// Cmd/Stat: 1ccccPPP CCCCCCCC
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#define IOSP_DATA_HDR_SIZE 2
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#define IOSP_CMD_HDR_SIZE 2
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#define IOSP_MAX_DATA_LENGTH 0x0FFF // 12 bits -> 4K
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#define IOSP_PORT_MASK 0x07 // Mask to isolate port number
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#define IOSP_CMD_STAT_BIT 0x80 // If set, this is command/status header
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#define IS_CMD_STAT_HDR(Byte1) ((Byte1) & IOSP_CMD_STAT_BIT)
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#define IS_DATA_HDR(Byte1) (!IS_CMD_STAT_HDR(Byte1))
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#define IOSP_GET_HDR_PORT(Byte1) ((__u8) ((Byte1) & IOSP_PORT_MASK))
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#define IOSP_GET_HDR_DATA_LEN(Byte1, Byte2) ((__u16) (((__u16)((Byte1) & 0x78)) << 5) | (Byte2))
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#define IOSP_GET_STATUS_CODE(Byte1) ((__u8) (((Byte1) & 0x78) >> 3))
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//
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// These macros build the 1st and 2nd bytes for a data header
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//
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#define IOSP_BUILD_DATA_HDR1(Port, Len) ((__u8) (((Port) | ((__u8) (((__u16) (Len)) >> 5) & 0x78))))
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#define IOSP_BUILD_DATA_HDR2(Port, Len) ((__u8) (Len))
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//
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// These macros build the 1st and 2nd bytes for a command header
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//
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#define IOSP_BUILD_CMD_HDR1(Port, Cmd) ((__u8) (IOSP_CMD_STAT_BIT | (Port) | ((__u8) ((Cmd) << 3))))
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//--------------------------------------------------------------
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//
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// Define values for commands and command parameters
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// (sent from Host to Edgeport)
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//
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// 1ccccPPP P1P1P1P1 [ P2P2P2P2P2 ]...
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//
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// cccc: 00-07 2-byte commands. Write UART register 0-7 with
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// value in P1. See 16650.H for definitions of
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// UART register numbers and contents.
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//
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// 08-0B 3-byte commands: ==== P1 ==== ==== P2 ====
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// 08 available for expansion
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// 09 1-param commands Command Code Param
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// 0A available for expansion
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// 0B available for expansion
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//
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// 0C-0D 4-byte commands. P1 = extended cmd and P2,P3 = params
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// Currently unimplemented.
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//
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// 0E-0F N-byte commands: P1 = num bytes after P1 (ie, TotalLen - 2)
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// P2 = extended cmd, P3..Pn = parameters.
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// Currently unimplemented.
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//
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#define IOSP_WRITE_UART_REG(n) ((n) & 0x07) // UartReg[ n ] := P1
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// Register numbers and contents
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// defined in 16554.H.
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// 0x08 // Available for expansion.
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#define IOSP_EXT_CMD 0x09 // P1 = Command code (defined below)
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// P2 = Parameter
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//
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// Extended Command values, used with IOSP_EXT_CMD, may
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// or may not use parameter P2.
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//
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#define IOSP_CMD_OPEN_PORT 0x00 // Enable ints, init UART. (NO PARAM)
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#define IOSP_CMD_CLOSE_PORT 0x01 // Disable ints, flush buffers. (NO PARAM)
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#define IOSP_CMD_CHASE_PORT 0x02 // Wait for Edgeport TX buffers to empty. (NO PARAM)
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#define IOSP_CMD_SET_RX_FLOW 0x03 // Set Rx Flow Control in Edgeport
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#define IOSP_CMD_SET_TX_FLOW 0x04 // Set Tx Flow Control in Edgeport
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#define IOSP_CMD_SET_XON_CHAR 0x05 // Set XON Character in Edgeport
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#define IOSP_CMD_SET_XOFF_CHAR 0x06 // Set XOFF Character in Edgeport
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#define IOSP_CMD_RX_CHECK_REQ 0x07 // Request Edgeport to insert a Checkpoint into
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// the receive data stream (Parameter = 1 byte sequence number)
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#define IOSP_CMD_SET_BREAK 0x08 // Turn on the BREAK (LCR bit 6)
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#define IOSP_CMD_CLEAR_BREAK 0x09 // Turn off the BREAK (LCR bit 6)
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//
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// Define macros to simplify building of IOSP cmds
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//
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#define MAKE_CMD_WRITE_REG(ppBuf, pLen, Port, Reg, Val) \
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do { \
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(*(ppBuf))[0] = IOSP_BUILD_CMD_HDR1((Port), \
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IOSP_WRITE_UART_REG(Reg)); \
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(*(ppBuf))[1] = (Val); \
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\
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*ppBuf += 2; \
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*pLen += 2; \
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} while (0)
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#define MAKE_CMD_EXT_CMD(ppBuf, pLen, Port, ExtCmd, Param) \
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do { \
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(*(ppBuf))[0] = IOSP_BUILD_CMD_HDR1((Port), IOSP_EXT_CMD); \
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(*(ppBuf))[1] = (ExtCmd); \
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(*(ppBuf))[2] = (Param); \
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\
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*ppBuf += 3; \
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*pLen += 3; \
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} while (0)
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//--------------------------------------------------------------
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//
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// Define format of flow control commands
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// (sent from Host to Edgeport)
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//
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// 11001PPP FlowCmd FlowTypes
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//
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// Note that the 'FlowTypes' parameter is a bit mask; that is,
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// more than one flow control type can be active at the same time.
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// FlowTypes = 0 means 'no flow control'.
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//
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//
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// IOSP_CMD_SET_RX_FLOW
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//
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// Tells Edgeport how it can stop incoming UART data
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//
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// Example for Port 0
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// P0 = 11001000
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// P1 = IOSP_CMD_SET_RX_FLOW
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// P2 = Bit mask as follows:
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#define IOSP_RX_FLOW_RTS 0x01 // Edgeport drops RTS to stop incoming data
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#define IOSP_RX_FLOW_DTR 0x02 // Edgeport drops DTR to stop incoming data
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#define IOSP_RX_FLOW_DSR_SENSITIVITY 0x04 // Ignores Rx data unless DSR high
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// Not currently implemented by firmware.
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#define IOSP_RX_FLOW_XON_XOFF 0x08 // Edgeport sends XOFF char to stop incoming data.
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// Host must have previously programmed the
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// XON/XOFF values with SET_XON/SET_XOFF
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// before enabling this bit.
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//
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// IOSP_CMD_SET_TX_FLOW
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//
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// Tells Edgeport what signal(s) will stop it from transmitting UART data
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//
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// Example for Port 0
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// P0 = 11001000
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// P1 = IOSP_CMD_SET_TX_FLOW
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// P2 = Bit mask as follows:
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#define IOSP_TX_FLOW_CTS 0x01 // Edgeport stops Tx if CTS low
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#define IOSP_TX_FLOW_DSR 0x02 // Edgeport stops Tx if DSR low
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#define IOSP_TX_FLOW_DCD 0x04 // Edgeport stops Tx if DCD low
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#define IOSP_TX_FLOW_XON_XOFF 0x08 // Edgeport stops Tx upon receiving XOFF char.
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// Host must have previously programmed the
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// XON/XOFF values with SET_XON/SET_XOFF
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// before enabling this bit.
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#define IOSP_TX_FLOW_XOFF_CONTINUE 0x10 // If not set, Edgeport stops Tx when
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// sending XOFF in order to fix broken
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// systems that interpret the next
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// received char as XON.
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// If set, Edgeport continues Tx
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// normally after transmitting XOFF.
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// Not currently implemented by firmware.
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#define IOSP_TX_TOGGLE_RTS 0x20 // Edgeport drives RTS as a true half-duplex
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// Request-to-Send signal: it is raised before
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// beginning transmission and lowered after
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// the last Tx char leaves the UART.
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// Not currently implemented by firmware.
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//
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// IOSP_CMD_SET_XON_CHAR
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//
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// Sets the character which Edgeport transmits/interprets as XON.
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// Note: This command MUST be sent before sending a SET_RX_FLOW or
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// SET_TX_FLOW with the XON_XOFF bit set.
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//
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// Example for Port 0
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// P0 = 11001000
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// P1 = IOSP_CMD_SET_XON_CHAR
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// P2 = 0x11
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//
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// IOSP_CMD_SET_XOFF_CHAR
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//
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// Sets the character which Edgeport transmits/interprets as XOFF.
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// Note: This command must be sent before sending a SET_RX_FLOW or
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// SET_TX_FLOW with the XON_XOFF bit set.
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//
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// Example for Port 0
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// P0 = 11001000
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// P1 = IOSP_CMD_SET_XOFF_CHAR
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// P2 = 0x13
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//
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// IOSP_CMD_RX_CHECK_REQ
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//
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// This command is used to assist in the implementation of the
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// IOCTL_SERIAL_PURGE Windows IOCTL.
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// This IOSP command tries to place a marker at the end of the RX
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// queue in the Edgeport. If the Edgeport RX queue is full then
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// the Check will be discarded.
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// It is up to the device driver to timeout waiting for the
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// RX_CHECK_RSP. If a RX_CHECK_RSP is received, the driver is
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// sure that all data has been received from the edgeport and
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// may now purge any internal RX buffers.
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// Note tat the sequence numbers may be used to detect lost
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// CHECK_REQs.
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// Example for Port 0
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// P0 = 11001000
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// P1 = IOSP_CMD_RX_CHECK_REQ
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// P2 = Sequence number
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// Response will be:
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// P1 = IOSP_EXT_RX_CHECK_RSP
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// P2 = Request Sequence number
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//--------------------------------------------------------------
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//
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// Define values for status and status parameters
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// (received by Host from Edgeport)
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//
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// 1ssssPPP P1P1P1P1 [ P2P2P2P2P2 ]...
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//
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// ssss: 00-07 2-byte status. ssss identifies which UART register
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// has changed value, and the new value is in P1.
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// Note that the ssss values do not correspond to the
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// 16554 register numbers given in 16554.H. Instead,
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// see below for definitions of the ssss numbers
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// used in this status message.
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//
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// 08-0B 3-byte status: ==== P1 ==== ==== P2 ====
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// 08 LSR_DATA: New LSR Errored byte
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// 09 1-param responses Response Code Param
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// 0A OPEN_RSP: InitialMsr TxBufferSize
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// 0B available for expansion
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//
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// 0C-0D 4-byte status. P1 = extended status code and P2,P3 = params
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// Not currently implemented.
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//
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// 0E-0F N-byte status: P1 = num bytes after P1 (ie, TotalLen - 2)
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// P2 = extended status, P3..Pn = parameters.
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// Not currently implemented.
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//
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/****************************************************
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* SSSS values for 2-byte status messages (0-8)
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****************************************************/
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#define IOSP_STATUS_LSR 0x00 // P1 is new value of LSR register.
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// Bits defined in 16554.H. Edgeport
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// returns this in order to report
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// line status errors (overrun,
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// parity, framing, break). This form
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// is used when a errored receive data
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// character was NOT present in the
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// UART when the LSR error occurred
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// (ie, when LSR bit 0 = 0).
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#define IOSP_STATUS_MSR 0x01 // P1 is new value of MSR register.
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// Bits defined in 16554.H. Edgeport
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// returns this in order to report
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// changes in modem status lines
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// (CTS, DSR, RI, CD)
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//
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// 0x02 // Available for future expansion
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// 0x03 //
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// 0x04 //
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// 0x05 //
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// 0x06 //
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// 0x07 //
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/****************************************************
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* SSSS values for 3-byte status messages (8-A)
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****************************************************/
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#define IOSP_STATUS_LSR_DATA 0x08 // P1 is new value of LSR register (same as STATUS_LSR)
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// P2 is errored character read from
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// RxFIFO after LSR reported an error.
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#define IOSP_EXT_STATUS 0x09 // P1 is status/response code, param in P2.
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// Response Codes (P1 values) for 3-byte status messages
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#define IOSP_EXT_STATUS_CHASE_RSP 0 // Reply to CHASE_PORT cmd. P2 is outcome:
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#define IOSP_EXT_STATUS_CHASE_PASS 0 // P2 = 0: All Tx data drained successfully
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#define IOSP_EXT_STATUS_CHASE_FAIL 1 // P2 = 1: Timed out (stuck due to flow
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// control from remote device).
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#define IOSP_EXT_STATUS_RX_CHECK_RSP 1 // Reply to RX_CHECK cmd. P2 is sequence number
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#define IOSP_STATUS_OPEN_RSP 0x0A // Reply to OPEN_PORT cmd.
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// P1 is Initial MSR value
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// P2 is encoded TxBuffer Size:
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// TxBufferSize = (P2 + 1) * 64
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// 0x0B // Available for future expansion
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#define GET_TX_BUFFER_SIZE(P2) (((P2) + 1) * 64)
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/****************************************************
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* SSSS values for 4-byte status messages
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****************************************************/
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#define IOSP_EXT4_STATUS 0x0C // Extended status code in P1,
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// Params in P2, P3
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// Currently unimplemented.
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// 0x0D // Currently unused, available.
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//
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// Macros to parse status messages
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//
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#define IOSP_GET_STATUS_LEN(code) ((code) < 8 ? 2 : ((code) < 0x0A ? 3 : 4))
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#define IOSP_STATUS_IS_2BYTE(code) ((code) < 0x08)
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#define IOSP_STATUS_IS_3BYTE(code) (((code) >= 0x08) && ((code) <= 0x0B))
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#define IOSP_STATUS_IS_4BYTE(code) (((code) >= 0x0C) && ((code) <= 0x0D))
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