..
asic_reg
drm/amdgpu: add vcn v2_6_0 ip headers (v3)
2021-03-10 00:01:20 -05:00
ivsrcid
drm/amdgpu: add DMUB trace event IRQ source define
2021-03-05 15:10:49 -05:00
aldebaran_ip_offset.h
drm/amd/include: add ip offset header for aldebaran (v5)
2021-03-10 00:01:29 -05:00
amd_acpi.h
drm/amd: Query and use ACPI backlight caps
2018-11-26 15:54:39 -05:00
amd_pcie_helpers.h
amd_pcie.h
drm/amdgpu:Add pcie gen5 support in pcie capability.
2021-01-21 09:54:56 -05:00
amd_shared.h
drm/amd/pm: enable DCS
2021-02-09 15:27:57 -05:00
arct_ip_offset.h
drm/amd/include/arct_ip_offset: Mark top-level IP_BASE definition as __maybe_unused
2020-11-24 12:09:53 -05:00
atom-bits.h
atom-names.h
atom-types.h
atombios.h
drm/amd/pm: correct VR shared rail info
2020-10-27 11:58:57 -04:00
atomfirmware.h
drm/amdpgu: add ATOM_DGPU_VRAM_TYPE_HBM2E vram type
2021-03-23 22:56:33 -04:00
atomfirmwareid.h
cgs_common.h
drm/amdgpu: retire indirect mmio reg support from cgs
2020-04-09 10:43:18 -04:00
cik_structs.h
drm/amdkfd: Shift sdma_engine_id and sdma_queue_id in mqd
2019-05-24 12:21:01 -05:00
dimgrey_cavefish_ip_offset.h
drm/amd/include/dimgrey_cavefish_ip_offset: Mark top-level IP_BASE as __maybe_unused
2020-11-24 12:09:53 -05:00
discovery.h
drm/amdgpu/discovery: reserve discovery data at the top of VRAM
2019-10-15 15:48:46 -04:00
displayobject.h
dm_pp_interface.h
kgd_kfd_interface.h
drm next for 5.10-rc1
2020-10-15 10:46:16 -07:00
kgd_pp_interface.h
drm/amd/pm: add new data in metrics table
2021-03-23 23:00:28 -04:00
navi10_enum.h
drm/amdgpu: add navi10 enums header
2019-06-20 15:54:46 -05:00
navi10_ip_offset.h
drm/amd/include/navi10_ip_offset: Mark top-level IP_BASE as __maybe_unused
2020-11-24 12:09:53 -05:00
navi12_ip_offset.h
drm/amd/include/navi12_ip_offset: Mark top-level IP_BASE as __maybe_unused
2020-11-24 12:09:53 -05:00
navi14_ip_offset.h
drm/amd/include/navi14_ip_offset: Mark top-level IP_BASE as __maybe_unused
2020-11-24 12:09:53 -05:00
pptable.h
renoir_ip_offset.h
drm/amd/include/renoir_ip_offset: Mark top-level IP_BASE as __maybe_unused
2021-01-14 13:20:20 -05:00
sienna_cichlid_ip_offset.h
drm/amd/include/sienna_cichlid_ip_offset: Mark top-level IP_BASE as __maybe_unused
2020-11-24 12:09:53 -05:00
soc15_hw_ip.h
drm/amdgpu: add navi10 ip offset header
2019-06-20 15:54:53 -05:00
soc15_ih_clientid.h
drm/amdgpu: Fix IH client ID naming table
2021-03-23 22:53:22 -04:00
v9_structs.h
drm/amdkfd: Extend CU mask to 8 SEs (v3)
2019-08-02 10:19:11 -05:00
v10_structs.h
drm/amdgpu: add v10 structs header (v2)
2019-06-20 21:16:37 -05:00
vangogh_ip_offset.h
drm/amd/include/vangogh_ip_offset: Mark top-level IP_BASE as __maybe_unused
2020-11-24 12:09:53 -05:00
vega10_enum.h
drm/amdgpu: Support new arcturus mtype
2019-09-13 17:35:48 -05:00
vega10_ip_offset.h
drm/amd/include/vega10_ip_offset: Mark _BASE structs as __maybe_unused
2020-11-13 17:29:46 -05:00
vega20_ip_offset.h
drm/amd/include/vega20_ip_offset: Mark top-level IP_BASE definition as __maybe_unused
2020-11-24 12:09:53 -05:00
vi_structs.h
drm/amdkfd: Check HIQ's MQD for queue preemption status
2021-03-23 22:59:25 -04:00