forked from Minki/linux
356 lines
5.7 KiB
ArmAsm
356 lines
5.7 KiB
ArmAsm
/*
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* File: arch/blackfin/kernel/context.S
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* Based on:
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* Author:
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*
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* Created:
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* Description:
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*
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* Modified:
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* Copyright 2004-2007 Analog Devices Inc.
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*
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* Bugs: Enter bugs at http://blackfin.uclinux.org/
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, see the file COPYING, or write
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* to the Free Software Foundation, Inc.,
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* 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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/*
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* NOTE! The single-stepping code assumes that all interrupt handlers
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* start by saving SYSCFG on the stack with their first instruction.
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*/
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/*
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* Code to save processor context.
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* We even save the register which are preserved by a function call
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* - r4, r5, r6, r7, p3, p4, p5
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*/
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.macro save_context_with_interrupts
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[--sp] = SYSCFG;
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[--sp] = P0; /*orig_p0*/
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[--sp] = R0; /*orig_r0*/
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[--sp] = ( R7:0, P5:0 );
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[--sp] = fp;
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[--sp] = usp;
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[--sp] = i0;
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[--sp] = i1;
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[--sp] = i2;
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[--sp] = i3;
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[--sp] = m0;
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[--sp] = m1;
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[--sp] = m2;
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[--sp] = m3;
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[--sp] = l0;
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[--sp] = l1;
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[--sp] = l2;
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[--sp] = l3;
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[--sp] = b0;
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[--sp] = b1;
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[--sp] = b2;
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[--sp] = b3;
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[--sp] = a0.x;
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[--sp] = a0.w;
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[--sp] = a1.x;
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[--sp] = a1.w;
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[--sp] = LC0;
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[--sp] = LC1;
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[--sp] = LT0;
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[--sp] = LT1;
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[--sp] = LB0;
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[--sp] = LB1;
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[--sp] = ASTAT;
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[--sp] = r0; /* Skip reserved */
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[--sp] = RETS;
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r0 = RETI;
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[--sp] = r0;
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[--sp] = RETX;
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[--sp] = RETN;
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[--sp] = RETE;
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[--sp] = SEQSTAT;
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[--sp] = r0; /* Skip IPEND as well. */
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/* Switch to other method of keeping interrupts disabled. */
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#ifdef CONFIG_DEBUG_HWERR
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r0 = 0x3f;
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sti r0;
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#else
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cli r0;
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#endif
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[--sp] = RETI; /*orig_pc*/
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/* Clear all L registers. */
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r0 = 0 (x);
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l0 = r0;
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l1 = r0;
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l2 = r0;
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l3 = r0;
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.endm
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.macro save_context_syscall
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[--sp] = SYSCFG;
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[--sp] = P0; /*orig_p0*/
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[--sp] = R0; /*orig_r0*/
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[--sp] = ( R7:0, P5:0 );
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[--sp] = fp;
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[--sp] = usp;
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[--sp] = i0;
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[--sp] = i1;
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[--sp] = i2;
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[--sp] = i3;
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[--sp] = m0;
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[--sp] = m1;
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[--sp] = m2;
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[--sp] = m3;
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[--sp] = l0;
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[--sp] = l1;
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[--sp] = l2;
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[--sp] = l3;
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[--sp] = b0;
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[--sp] = b1;
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[--sp] = b2;
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[--sp] = b3;
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[--sp] = a0.x;
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[--sp] = a0.w;
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[--sp] = a1.x;
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[--sp] = a1.w;
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[--sp] = LC0;
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[--sp] = LC1;
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[--sp] = LT0;
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[--sp] = LT1;
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[--sp] = LB0;
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[--sp] = LB1;
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[--sp] = ASTAT;
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[--sp] = r0; /* Skip reserved */
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[--sp] = RETS;
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r0 = RETI;
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[--sp] = r0;
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[--sp] = RETX;
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[--sp] = RETN;
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[--sp] = RETE;
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[--sp] = SEQSTAT;
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[--sp] = r0; /* Skip IPEND as well. */
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[--sp] = RETI; /*orig_pc*/
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/* Clear all L registers. */
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r0 = 0 (x);
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l0 = r0;
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l1 = r0;
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l2 = r0;
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l3 = r0;
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.endm
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.macro save_context_no_interrupts
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[--sp] = SYSCFG;
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[--sp] = P0; /* orig_p0 */
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[--sp] = R0; /* orig_r0 */
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[--sp] = ( R7:0, P5:0 );
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[--sp] = fp;
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[--sp] = usp;
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[--sp] = i0;
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[--sp] = i1;
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[--sp] = i2;
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[--sp] = i3;
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[--sp] = m0;
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[--sp] = m1;
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[--sp] = m2;
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[--sp] = m3;
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[--sp] = l0;
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[--sp] = l1;
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[--sp] = l2;
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[--sp] = l3;
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[--sp] = b0;
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[--sp] = b1;
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[--sp] = b2;
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[--sp] = b3;
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[--sp] = a0.x;
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[--sp] = a0.w;
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[--sp] = a1.x;
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[--sp] = a1.w;
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[--sp] = LC0;
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[--sp] = LC1;
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[--sp] = LT0;
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[--sp] = LT1;
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[--sp] = LB0;
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[--sp] = LB1;
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[--sp] = ASTAT;
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#ifdef CONFIG_KGDB
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fp = 0(Z);
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r1 = sp;
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r1 += 60;
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r1 += 60;
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r1 += 60;
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[--sp] = r1;
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#else
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[--sp] = r0; /* Skip reserved */
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#endif
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[--sp] = RETS;
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r0 = RETI;
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[--sp] = r0;
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[--sp] = RETX;
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[--sp] = RETN;
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[--sp] = RETE;
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[--sp] = SEQSTAT;
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#ifdef CONFIG_KGDB
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r1.l = lo(IPEND);
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r1.h = hi(IPEND);
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[--sp] = r1;
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#else
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[--sp] = r0; /* Skip IPEND as well. */
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#endif
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[--sp] = r0; /*orig_pc*/
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/* Clear all L registers. */
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r0 = 0 (x);
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l0 = r0;
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l1 = r0;
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l2 = r0;
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l3 = r0;
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.endm
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.macro restore_context_no_interrupts
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sp += 4; /* Skip orig_pc */
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sp += 4; /* Skip IPEND */
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SEQSTAT = [sp++];
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RETE = [sp++];
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RETN = [sp++];
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RETX = [sp++];
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r0 = [sp++];
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RETI = r0; /* Restore RETI indirectly when in exception */
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RETS = [sp++];
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sp += 4; /* Skip Reserved */
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ASTAT = [sp++];
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LB1 = [sp++];
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LB0 = [sp++];
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LT1 = [sp++];
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LT0 = [sp++];
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LC1 = [sp++];
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LC0 = [sp++];
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a1.w = [sp++];
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a1.x = [sp++];
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a0.w = [sp++];
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a0.x = [sp++];
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b3 = [sp++];
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b2 = [sp++];
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b1 = [sp++];
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b0 = [sp++];
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l3 = [sp++];
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l2 = [sp++];
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l1 = [sp++];
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l0 = [sp++];
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m3 = [sp++];
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m2 = [sp++];
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m1 = [sp++];
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m0 = [sp++];
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i3 = [sp++];
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i2 = [sp++];
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i1 = [sp++];
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i0 = [sp++];
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sp += 4;
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fp = [sp++];
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( R7 : 0, P5 : 0) = [ SP ++ ];
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sp += 8; /* Skip orig_r0/orig_p0 */
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SYSCFG = [sp++];
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.endm
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.macro restore_context_with_interrupts
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sp += 4; /* Skip orig_pc */
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sp += 4; /* Skip IPEND */
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SEQSTAT = [sp++];
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RETE = [sp++];
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RETN = [sp++];
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RETX = [sp++];
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RETI = [sp++];
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RETS = [sp++];
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p0.h = _irq_flags;
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p0.l = _irq_flags;
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r0 = [p0];
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sti r0;
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sp += 4; /* Skip Reserved */
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ASTAT = [sp++];
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LB1 = [sp++];
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LB0 = [sp++];
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LT1 = [sp++];
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LT0 = [sp++];
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LC1 = [sp++];
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LC0 = [sp++];
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a1.w = [sp++];
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a1.x = [sp++];
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a0.w = [sp++];
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a0.x = [sp++];
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b3 = [sp++];
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b2 = [sp++];
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b1 = [sp++];
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b0 = [sp++];
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l3 = [sp++];
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l2 = [sp++];
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l1 = [sp++];
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l0 = [sp++];
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m3 = [sp++];
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m2 = [sp++];
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m1 = [sp++];
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m0 = [sp++];
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i3 = [sp++];
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i2 = [sp++];
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i1 = [sp++];
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i0 = [sp++];
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sp += 4;
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fp = [sp++];
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( R7 : 0, P5 : 0) = [ SP ++ ];
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sp += 8; /* Skip orig_r0/orig_p0 */
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csync;
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SYSCFG = [sp++];
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csync;
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.endm
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