6d1d72fb4f
[Why] FIFO reset is only necessary for fast boot sequence, where otg is disabled and dig fe is enabled when changing dispclk. Fast boot is only enabled on embedded displays. [How] Change FIFO reset condition to "embedded display only". Signed-off-by: Zhan Liu <zhan.liu@amd.com> Reviewed-by: Charlene Liu <charlene.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> |
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| .. | ||
| dce110_compressor.c | ||
| dce110_compressor.h | ||
| dce110_hw_sequencer.c | ||
| dce110_hw_sequencer.h | ||
| dce110_mem_input_v.c | ||
| dce110_mem_input_v.h | ||
| dce110_opp_csc_v.c | ||
| dce110_opp_regamma_v.c | ||
| dce110_opp_v.c | ||
| dce110_opp_v.h | ||
| dce110_resource.c | ||
| dce110_resource.h | ||
| dce110_timing_generator_v.c | ||
| dce110_timing_generator_v.h | ||
| dce110_timing_generator.c | ||
| dce110_timing_generator.h | ||
| dce110_transform_v.c | ||
| dce110_transform_v.h | ||
| Makefile | ||