forked from Minki/linux
c2d5a71064
The powerpc arch code enables PCI_COMMAND_MEMORY (and has done so for more than 10 years at least !) on pci_enable_device() and the hackery on the MMIO accessor is useless as well, our writel does everything this driver should need. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
149 lines
3.8 KiB
C
149 lines
3.8 KiB
C
/*
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bt878.h - Bt878 audio module (register offsets)
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Copyright (C) 2002 Peter Hettkamp <peter.hettkamp@htp-tel.de>
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#ifndef _BT878_H_
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#define _BT878_H_
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#include <linux/interrupt.h>
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#include <linux/pci.h>
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#include <linux/sched.h>
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#include <linux/spinlock.h>
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#include <linux/mutex.h>
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#include "bt848.h"
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#include "bttv.h"
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#define BT878_VERSION_CODE 0x000000
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#define BT878_AINT_STAT 0x100
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#define BT878_ARISCS (0xf<<28)
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#define BT878_ARISC_EN (1<<27)
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#define BT878_ASCERR (1<<19)
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#define BT878_AOCERR (1<<18)
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#define BT878_APABORT (1<<17)
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#define BT878_ARIPERR (1<<16)
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#define BT878_APPERR (1<<15)
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#define BT878_AFDSR (1<<14)
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#define BT878_AFTRGT (1<<13)
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#define BT878_AFBUS (1<<12)
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#define BT878_ARISCI (1<<11)
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#define BT878_AOFLOW (1<<3)
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#define BT878_AINT_MASK 0x104
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#define BT878_AGPIO_DMA_CTL 0x10c
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#define BT878_A_GAIN (0xf<<28)
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#define BT878_A_G2X (1<<27)
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#define BT878_A_PWRDN (1<<26)
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#define BT878_A_SEL (3<<24)
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#define BT878_DA_SCE (1<<23)
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#define BT878_DA_LRI (1<<22)
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#define BT878_DA_MLB (1<<21)
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#define BT878_DA_LRD (0x1f<<16)
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#define BT878_DA_DPM (1<<15)
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#define BT878_DA_SBR (1<<14)
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#define BT878_DA_ES2 (1<<13)
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#define BT878_DA_LMT (1<<12)
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#define BT878_DA_SDR (0xf<<8)
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#define BT878_DA_IOM (3<<6)
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#define BT878_DA_APP (1<<5)
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#define BT878_ACAP_EN (1<<4)
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#define BT878_PKTP (3<<2)
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#define BT878_RISC_EN (1<<1)
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#define BT878_FIFO_EN 1
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#define BT878_APACK_LEN 0x110
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#define BT878_AFP_LEN (0xff<<16)
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#define BT878_ALP_LEN 0xfff
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#define BT878_ARISC_START 0x114
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#define BT878_ARISC_PC 0x120
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/* BT878 FUNCTION 0 REGISTERS */
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#define BT878_GPIO_DMA_CTL 0x10c
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/* Interrupt register */
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#define BT878_INT_STAT 0x100
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#define BT878_INT_MASK 0x104
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#define BT878_I2CRACK (1<<25)
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#define BT878_I2CDONE (1<<8)
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#define BT878_MAX 4
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#define BT878_RISC_SYNC_MASK (1 << 15)
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#define BTTV_BOARD_UNKNOWN 0x00
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#define BTTV_BOARD_PINNACLESAT 0x5e
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#define BTTV_BOARD_NEBULA_DIGITV 0x68
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#define BTTV_BOARD_PC_HDTV 0x70
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#define BTTV_BOARD_TWINHAN_DST 0x71
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#define BTTV_BOARD_AVDVBT_771 0x7b
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#define BTTV_BOARD_AVDVBT_761 0x7c
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#define BTTV_BOARD_DVICO_DVBT_LITE 0x80
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#define BTTV_BOARD_DVICO_FUSIONHDTV_5_LITE 0x87
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extern int bt878_num;
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struct bt878 {
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struct mutex gpio_lock;
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unsigned int nr;
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unsigned int bttv_nr;
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struct i2c_adapter *adapter;
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struct pci_dev *dev;
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unsigned int id;
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unsigned int TS_Size;
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unsigned char revision;
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unsigned int irq;
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unsigned long bt878_adr;
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volatile void __iomem *bt878_mem; /* function 1 */
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volatile u32 finished_block;
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volatile u32 last_block;
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u32 block_count;
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u32 block_bytes;
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u32 line_bytes;
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u32 line_count;
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u32 buf_size;
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u8 *buf_cpu;
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dma_addr_t buf_dma;
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u32 risc_size;
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__le32 *risc_cpu;
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dma_addr_t risc_dma;
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u32 risc_pos;
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struct tasklet_struct tasklet;
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int shutdown;
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};
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extern struct bt878 bt878[BT878_MAX];
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void bt878_start(struct bt878 *bt, u32 controlreg, u32 op_sync_orin,
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u32 irq_err_ignore);
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void bt878_stop(struct bt878 *bt);
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#define bmtwrite(dat,adr) writel((dat), (adr))
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#define bmtread(adr) readl(adr)
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#endif
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