7a67cbea65
This makes life easier for future non-PCI drivers where access to the registers might be more complicated. Note that Linux drivers are pretty evenly split between the two versions, and in fact the NVMe driver already uses offsets for the doorbells. Signed-off-by: Christoph Hellwig <hch@lst.de> Acked-by: Keith Busch <keith.busch@intel.com> [Fixed CMBSZ offset] Signed-off-by: Keith Busch <keith.busch@intel.com> Signed-off-by: Jens Axboe <axboe@fb.com>
130 lines
3.4 KiB
C
130 lines
3.4 KiB
C
/*
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* Copyright (c) 2011-2014, Intel Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*/
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#ifndef _NVME_H
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#define _NVME_H
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#include <linux/nvme.h>
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#include <linux/pci.h>
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#include <linux/kref.h>
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#include <linux/blk-mq.h>
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extern unsigned char nvme_io_timeout;
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#define NVME_IO_TIMEOUT (nvme_io_timeout * HZ)
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extern unsigned char admin_timeout;
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#define ADMIN_TIMEOUT (admin_timeout * HZ)
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enum {
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NVME_NS_LBA = 0,
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NVME_NS_LIGHTNVM = 1,
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};
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/*
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* Represents an NVM Express device. Each nvme_dev is a PCI function.
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*/
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struct nvme_dev {
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struct list_head node;
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struct nvme_queue **queues;
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struct request_queue *admin_q;
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struct blk_mq_tag_set tagset;
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struct blk_mq_tag_set admin_tagset;
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u32 __iomem *dbs;
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struct device *dev;
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struct dma_pool *prp_page_pool;
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struct dma_pool *prp_small_pool;
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int instance;
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unsigned queue_count;
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unsigned online_queues;
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unsigned max_qid;
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int q_depth;
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u32 db_stride;
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u32 ctrl_config;
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struct msix_entry *entry;
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void __iomem *bar;
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struct list_head namespaces;
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struct kref kref;
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struct device *device;
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struct work_struct reset_work;
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struct work_struct probe_work;
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struct work_struct scan_work;
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char name[12];
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char serial[20];
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char model[40];
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char firmware_rev[8];
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bool subsystem;
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u32 max_hw_sectors;
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u32 stripe_size;
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u32 page_size;
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void __iomem *cmb;
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dma_addr_t cmb_dma_addr;
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u64 cmb_size;
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u32 cmbsz;
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u16 oncs;
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u16 abort_limit;
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u8 event_limit;
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u8 vwc;
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};
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/*
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* An NVM Express namespace is equivalent to a SCSI LUN
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*/
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struct nvme_ns {
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struct list_head list;
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struct nvme_dev *dev;
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struct request_queue *queue;
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struct gendisk *disk;
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struct kref kref;
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unsigned ns_id;
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int lba_shift;
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u16 ms;
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bool ext;
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u8 pi_type;
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int type;
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u64 mode_select_num_blocks;
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u32 mode_select_block_len;
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};
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static inline u64 nvme_block_nr(struct nvme_ns *ns, sector_t sector)
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{
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return (sector >> (ns->lba_shift - 9));
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}
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int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
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void *buf, unsigned bufflen);
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int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
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void *buffer, void __user *ubuffer, unsigned bufflen,
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u32 *result, unsigned timeout);
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int nvme_identify_ctrl(struct nvme_dev *dev, struct nvme_id_ctrl **id);
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int nvme_identify_ns(struct nvme_dev *dev, unsigned nsid,
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struct nvme_id_ns **id);
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int nvme_get_log_page(struct nvme_dev *dev, struct nvme_smart_log **log);
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int nvme_get_features(struct nvme_dev *dev, unsigned fid, unsigned nsid,
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dma_addr_t dma_addr, u32 *result);
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int nvme_set_features(struct nvme_dev *dev, unsigned fid, unsigned dword11,
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dma_addr_t dma_addr, u32 *result);
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struct sg_io_hdr;
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int nvme_sg_io(struct nvme_ns *ns, struct sg_io_hdr __user *u_hdr);
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int nvme_sg_io32(struct nvme_ns *ns, unsigned long arg);
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int nvme_sg_get_version_num(int __user *ip);
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int nvme_nvm_ns_supported(struct nvme_ns *ns, struct nvme_id_ns *id);
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int nvme_nvm_register(struct request_queue *q, char *disk_name);
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void nvme_nvm_unregister(struct request_queue *q, char *disk_name);
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#endif /* _NVME_H */
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