Aneesh Kumar K.V bf16cdf48a powerpc/mm/radix: Update LPCR HR bit as per ISA ... PowerISA 3.0 requires the MMU mode (radix vs. hash) of the hypervisor to be mirrored in the LPCR register, in addition to the partition table. This is done to avoid fetching from the table when deciding, among other things, how to perform transitions to HV mode on some interrupts. So let's set it up appropriately Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> Acked-by: Balbir Singh <bsingharora@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>		2016-07-17 16:42:50 +10:00
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asm	powerpc/mm/radix: Update LPCR HR bit as per ISA	2016-07-17 16:42:50 +10:00
uapi/asm	powerpc updates for 4.7	2016-05-20 10:12:41 -07:00