forked from Minki/linux
bdda1a61c1
A previous fix had gone though and disabled relaxed ordering for Rx descriptor read fetching. This was not necessary as this functions correctly and has no ill effects on the system. In addition several of the defines used for the DCA control registers were incorrect in that they indicated descriptor effects when they actually had an impact on either data or header write back. As such I have update these to correctly reflect either DATA or HEAD. Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Tested-by: Stephen Ko <stephen.s.ko@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> |
||
---|---|---|
.. | ||
e1000 | ||
e1000e | ||
igb | ||
igbvf | ||
ixgb | ||
ixgbe | ||
ixgbevf | ||
e100.c | ||
Kconfig | ||
Makefile |