forked from Minki/linux
bbf1453e28
Support for loading the ak4642 codec module via devicetree. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
601 lines
14 KiB
C
601 lines
14 KiB
C
/*
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* ak4642.c -- AK4642/AK4643 ALSA Soc Audio driver
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*
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* Copyright (C) 2009 Renesas Solutions Corp.
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* Kuninori Morimoto <morimoto.kuninori@renesas.com>
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*
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* Based on wm8731.c by Richard Purdie
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* Based on ak4535.c by Richard Purdie
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* Based on wm8753.c by Liam Girdwood
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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/* ** CAUTION **
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*
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* This is very simple driver.
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* It can use headphone output / stereo input only
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*
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* AK4642 is tested.
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* AK4643 is tested.
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* AK4648 is tested.
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*/
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#include <linux/delay.h>
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#include <linux/i2c.h>
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#include <linux/slab.h>
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#include <linux/of_device.h>
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#include <linux/module.h>
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#include <sound/soc.h>
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#include <sound/initval.h>
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#include <sound/tlv.h>
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#define PW_MGMT1 0x00
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#define PW_MGMT2 0x01
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#define SG_SL1 0x02
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#define SG_SL2 0x03
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#define MD_CTL1 0x04
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#define MD_CTL2 0x05
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#define TIMER 0x06
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#define ALC_CTL1 0x07
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#define ALC_CTL2 0x08
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#define L_IVC 0x09
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#define L_DVC 0x0a
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#define ALC_CTL3 0x0b
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#define R_IVC 0x0c
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#define R_DVC 0x0d
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#define MD_CTL3 0x0e
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#define MD_CTL4 0x0f
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#define PW_MGMT3 0x10
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#define DF_S 0x11
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#define FIL3_0 0x12
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#define FIL3_1 0x13
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#define FIL3_2 0x14
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#define FIL3_3 0x15
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#define EQ_0 0x16
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#define EQ_1 0x17
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#define EQ_2 0x18
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#define EQ_3 0x19
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#define EQ_4 0x1a
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#define EQ_5 0x1b
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#define FIL1_0 0x1c
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#define FIL1_1 0x1d
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#define FIL1_2 0x1e
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#define FIL1_3 0x1f
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#define PW_MGMT4 0x20
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#define MD_CTL5 0x21
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#define LO_MS 0x22
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#define HP_MS 0x23
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#define SPK_MS 0x24
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/* PW_MGMT1*/
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#define PMVCM (1 << 6) /* VCOM Power Management */
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#define PMMIN (1 << 5) /* MIN Input Power Management */
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#define PMDAC (1 << 2) /* DAC Power Management */
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#define PMADL (1 << 0) /* MIC Amp Lch and ADC Lch Power Management */
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/* PW_MGMT2 */
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#define HPMTN (1 << 6)
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#define PMHPL (1 << 5)
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#define PMHPR (1 << 4)
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#define MS (1 << 3) /* master/slave select */
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#define MCKO (1 << 1)
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#define PMPLL (1 << 0)
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#define PMHP_MASK (PMHPL | PMHPR)
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#define PMHP PMHP_MASK
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/* PW_MGMT3 */
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#define PMADR (1 << 0) /* MIC L / ADC R Power Management */
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/* SG_SL1 */
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#define MINS (1 << 6) /* Switch from MIN to Speaker */
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#define DACL (1 << 4) /* Switch from DAC to Stereo or Receiver */
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#define PMMP (1 << 2) /* MPWR pin Power Management */
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#define MGAIN0 (1 << 0) /* MIC amp gain*/
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/* TIMER */
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#define ZTM(param) ((param & 0x3) << 4) /* ALC Zoro Crossing TimeOut */
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#define WTM(param) (((param & 0x4) << 4) | ((param & 0x3) << 2))
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/* ALC_CTL1 */
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#define ALC (1 << 5) /* ALC Enable */
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#define LMTH0 (1 << 0) /* ALC Limiter / Recovery Level */
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/* MD_CTL1 */
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#define PLL3 (1 << 7)
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#define PLL2 (1 << 6)
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#define PLL1 (1 << 5)
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#define PLL0 (1 << 4)
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#define PLL_MASK (PLL3 | PLL2 | PLL1 | PLL0)
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#define BCKO_MASK (1 << 3)
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#define BCKO_64 BCKO_MASK
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#define DIF_MASK (3 << 0)
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#define DSP (0 << 0)
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#define RIGHT_J (1 << 0)
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#define LEFT_J (2 << 0)
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#define I2S (3 << 0)
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/* MD_CTL2 */
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#define FS0 (1 << 0)
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#define FS1 (1 << 1)
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#define FS2 (1 << 2)
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#define FS3 (1 << 5)
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#define FS_MASK (FS0 | FS1 | FS2 | FS3)
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/* MD_CTL3 */
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#define BST1 (1 << 3)
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/* MD_CTL4 */
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#define DACH (1 << 0)
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/*
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* Playback Volume (table 39)
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*
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* max : 0x00 : +12.0 dB
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* ( 0.5 dB step )
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* min : 0xFE : -115.0 dB
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* mute: 0xFF
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*/
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static const DECLARE_TLV_DB_SCALE(out_tlv, -11550, 50, 1);
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static const struct snd_kcontrol_new ak4642_snd_controls[] = {
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SOC_DOUBLE_R_TLV("Digital Playback Volume", L_DVC, R_DVC,
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0, 0xFF, 1, out_tlv),
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};
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static const struct snd_kcontrol_new ak4642_headphone_control =
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SOC_DAPM_SINGLE("Switch", PW_MGMT2, 6, 1, 0);
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static const struct snd_kcontrol_new ak4642_lout_mixer_controls[] = {
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SOC_DAPM_SINGLE("DACL", SG_SL1, 4, 1, 0),
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};
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static const struct snd_soc_dapm_widget ak4642_dapm_widgets[] = {
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/* Outputs */
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SND_SOC_DAPM_OUTPUT("HPOUTL"),
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SND_SOC_DAPM_OUTPUT("HPOUTR"),
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SND_SOC_DAPM_OUTPUT("LINEOUT"),
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SND_SOC_DAPM_PGA("HPL Out", PW_MGMT2, 5, 0, NULL, 0),
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SND_SOC_DAPM_PGA("HPR Out", PW_MGMT2, 4, 0, NULL, 0),
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SND_SOC_DAPM_SWITCH("Headphone Enable", SND_SOC_NOPM, 0, 0,
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&ak4642_headphone_control),
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SND_SOC_DAPM_PGA("DACH", MD_CTL4, 0, 0, NULL, 0),
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SND_SOC_DAPM_MIXER("LINEOUT Mixer", PW_MGMT1, 3, 0,
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&ak4642_lout_mixer_controls[0],
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ARRAY_SIZE(ak4642_lout_mixer_controls)),
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/* DAC */
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SND_SOC_DAPM_DAC("DAC", "HiFi Playback", PW_MGMT1, 2, 0),
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};
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static const struct snd_soc_dapm_route ak4642_intercon[] = {
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/* Outputs */
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{"HPOUTL", NULL, "HPL Out"},
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{"HPOUTR", NULL, "HPR Out"},
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{"LINEOUT", NULL, "LINEOUT Mixer"},
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{"HPL Out", NULL, "Headphone Enable"},
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{"HPR Out", NULL, "Headphone Enable"},
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{"Headphone Enable", "Switch", "DACH"},
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{"DACH", NULL, "DAC"},
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{"LINEOUT Mixer", "DACL", "DAC"},
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};
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/*
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* ak4642 register cache
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*/
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static const u8 ak4642_reg[] = {
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0x00, 0x00, 0x01, 0x00,
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0x02, 0x00, 0x00, 0x00,
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0xe1, 0xe1, 0x18, 0x00,
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0xe1, 0x18, 0x11, 0x08,
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0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00,
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0x00,
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};
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static const u8 ak4648_reg[] = {
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0x00, 0x00, 0x01, 0x00,
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0x02, 0x00, 0x00, 0x00,
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0xe1, 0xe1, 0x18, 0x00,
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0xe1, 0x18, 0x11, 0xb8,
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0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00,
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0x00, 0x88, 0x88, 0x08,
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};
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static int ak4642_dai_startup(struct snd_pcm_substream *substream,
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struct snd_soc_dai *dai)
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{
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int is_play = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
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struct snd_soc_codec *codec = dai->codec;
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if (is_play) {
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/*
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* start headphone output
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*
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* PLL, Master Mode
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* Audio I/F Format :MSB justified (ADC & DAC)
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* Bass Boost Level : Middle
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*
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* This operation came from example code of
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* "ASAHI KASEI AK4642" (japanese) manual p97.
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*/
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snd_soc_write(codec, L_IVC, 0x91); /* volume */
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snd_soc_write(codec, R_IVC, 0x91); /* volume */
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} else {
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/*
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* start stereo input
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*
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* PLL Master Mode
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* Audio I/F Format:MSB justified (ADC & DAC)
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* Pre MIC AMP:+20dB
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* MIC Power On
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* ALC setting:Refer to Table 35
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* ALC bit=“1”
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*
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* This operation came from example code of
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* "ASAHI KASEI AK4642" (japanese) manual p94.
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*/
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snd_soc_write(codec, SG_SL1, PMMP | MGAIN0);
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snd_soc_write(codec, TIMER, ZTM(0x3) | WTM(0x3));
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snd_soc_write(codec, ALC_CTL1, ALC | LMTH0);
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snd_soc_update_bits(codec, PW_MGMT1, PMADL, PMADL);
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snd_soc_update_bits(codec, PW_MGMT3, PMADR, PMADR);
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}
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return 0;
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}
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static void ak4642_dai_shutdown(struct snd_pcm_substream *substream,
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struct snd_soc_dai *dai)
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{
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int is_play = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
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struct snd_soc_codec *codec = dai->codec;
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if (is_play) {
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} else {
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/* stop stereo input */
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snd_soc_update_bits(codec, PW_MGMT1, PMADL, 0);
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snd_soc_update_bits(codec, PW_MGMT3, PMADR, 0);
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snd_soc_update_bits(codec, ALC_CTL1, ALC, 0);
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}
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}
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static int ak4642_dai_set_sysclk(struct snd_soc_dai *codec_dai,
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int clk_id, unsigned int freq, int dir)
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{
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struct snd_soc_codec *codec = codec_dai->codec;
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u8 pll;
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switch (freq) {
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case 11289600:
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pll = PLL2;
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break;
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case 12288000:
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pll = PLL2 | PLL0;
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break;
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case 12000000:
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pll = PLL2 | PLL1;
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break;
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case 24000000:
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pll = PLL2 | PLL1 | PLL0;
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break;
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case 13500000:
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pll = PLL3 | PLL2;
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break;
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case 27000000:
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pll = PLL3 | PLL2 | PLL0;
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break;
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default:
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return -EINVAL;
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}
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snd_soc_update_bits(codec, MD_CTL1, PLL_MASK, pll);
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return 0;
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}
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static int ak4642_dai_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
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{
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struct snd_soc_codec *codec = dai->codec;
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u8 data;
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u8 bcko;
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data = MCKO | PMPLL; /* use MCKO */
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bcko = 0;
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/* set master/slave audio interface */
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switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
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case SND_SOC_DAIFMT_CBM_CFM:
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data |= MS;
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bcko = BCKO_64;
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break;
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case SND_SOC_DAIFMT_CBS_CFS:
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break;
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default:
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return -EINVAL;
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}
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snd_soc_update_bits(codec, PW_MGMT2, MS | MCKO | PMPLL, data);
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snd_soc_update_bits(codec, MD_CTL1, BCKO_MASK, bcko);
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/* format type */
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data = 0;
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switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
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case SND_SOC_DAIFMT_LEFT_J:
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data = LEFT_J;
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break;
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case SND_SOC_DAIFMT_I2S:
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data = I2S;
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break;
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/* FIXME
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* Please add RIGHT_J / DSP support here
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*/
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default:
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return -EINVAL;
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break;
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}
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snd_soc_update_bits(codec, MD_CTL1, DIF_MASK, data);
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return 0;
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}
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static int ak4642_dai_hw_params(struct snd_pcm_substream *substream,
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struct snd_pcm_hw_params *params,
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struct snd_soc_dai *dai)
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{
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struct snd_soc_codec *codec = dai->codec;
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u8 rate;
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switch (params_rate(params)) {
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case 7350:
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rate = FS2;
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break;
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case 8000:
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rate = 0;
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break;
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case 11025:
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rate = FS2 | FS0;
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break;
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case 12000:
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rate = FS0;
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break;
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case 14700:
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rate = FS2 | FS1;
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break;
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case 16000:
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rate = FS1;
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break;
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case 22050:
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rate = FS2 | FS1 | FS0;
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break;
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case 24000:
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rate = FS1 | FS0;
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break;
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case 29400:
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rate = FS3 | FS2 | FS1;
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break;
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case 32000:
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rate = FS3 | FS1;
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break;
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case 44100:
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rate = FS3 | FS2 | FS1 | FS0;
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break;
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case 48000:
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rate = FS3 | FS1 | FS0;
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break;
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default:
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return -EINVAL;
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break;
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}
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snd_soc_update_bits(codec, MD_CTL2, FS_MASK, rate);
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return 0;
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}
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static int ak4642_set_bias_level(struct snd_soc_codec *codec,
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enum snd_soc_bias_level level)
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{
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switch (level) {
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case SND_SOC_BIAS_OFF:
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snd_soc_write(codec, PW_MGMT1, 0x00);
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break;
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default:
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snd_soc_update_bits(codec, PW_MGMT1, PMVCM, PMVCM);
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break;
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}
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codec->dapm.bias_level = level;
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return 0;
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}
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static const struct snd_soc_dai_ops ak4642_dai_ops = {
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.startup = ak4642_dai_startup,
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.shutdown = ak4642_dai_shutdown,
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.set_sysclk = ak4642_dai_set_sysclk,
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.set_fmt = ak4642_dai_set_fmt,
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.hw_params = ak4642_dai_hw_params,
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};
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static struct snd_soc_dai_driver ak4642_dai = {
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.name = "ak4642-hifi",
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.playback = {
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.stream_name = "Playback",
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.channels_min = 1,
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.channels_max = 2,
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.rates = SNDRV_PCM_RATE_8000_48000,
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.formats = SNDRV_PCM_FMTBIT_S16_LE },
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.capture = {
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.stream_name = "Capture",
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.channels_min = 1,
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.channels_max = 2,
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.rates = SNDRV_PCM_RATE_8000_48000,
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.formats = SNDRV_PCM_FMTBIT_S16_LE },
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.ops = &ak4642_dai_ops,
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.symmetric_rates = 1,
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};
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static int ak4642_resume(struct snd_soc_codec *codec)
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{
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snd_soc_cache_sync(codec);
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return 0;
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}
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static int ak4642_probe(struct snd_soc_codec *codec)
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{
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int ret;
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ret = snd_soc_codec_set_cache_io(codec, 8, 8, SND_SOC_I2C);
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if (ret < 0) {
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dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
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return ret;
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}
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snd_soc_add_codec_controls(codec, ak4642_snd_controls,
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ARRAY_SIZE(ak4642_snd_controls));
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ak4642_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
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return 0;
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}
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static int ak4642_remove(struct snd_soc_codec *codec)
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{
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ak4642_set_bias_level(codec, SND_SOC_BIAS_OFF);
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return 0;
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}
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static struct snd_soc_codec_driver soc_codec_dev_ak4642 = {
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.probe = ak4642_probe,
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.remove = ak4642_remove,
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.resume = ak4642_resume,
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.set_bias_level = ak4642_set_bias_level,
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.reg_cache_default = ak4642_reg, /* ak4642 reg */
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.reg_cache_size = ARRAY_SIZE(ak4642_reg), /* ak4642 reg */
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.reg_word_size = sizeof(u8),
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.dapm_widgets = ak4642_dapm_widgets,
|
|
.num_dapm_widgets = ARRAY_SIZE(ak4642_dapm_widgets),
|
|
.dapm_routes = ak4642_intercon,
|
|
.num_dapm_routes = ARRAY_SIZE(ak4642_intercon),
|
|
};
|
|
|
|
static struct snd_soc_codec_driver soc_codec_dev_ak4648 = {
|
|
.probe = ak4642_probe,
|
|
.remove = ak4642_remove,
|
|
.resume = ak4642_resume,
|
|
.set_bias_level = ak4642_set_bias_level,
|
|
.reg_cache_default = ak4648_reg, /* ak4648 reg */
|
|
.reg_cache_size = ARRAY_SIZE(ak4648_reg), /* ak4648 reg */
|
|
.reg_word_size = sizeof(u8),
|
|
.dapm_widgets = ak4642_dapm_widgets,
|
|
.num_dapm_widgets = ARRAY_SIZE(ak4642_dapm_widgets),
|
|
.dapm_routes = ak4642_intercon,
|
|
.num_dapm_routes = ARRAY_SIZE(ak4642_intercon),
|
|
};
|
|
|
|
#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
|
|
static struct of_device_id ak4642_of_match[];
|
|
static int ak4642_i2c_probe(struct i2c_client *i2c,
|
|
const struct i2c_device_id *id)
|
|
{
|
|
struct device_node *np = i2c->dev.of_node;
|
|
const struct snd_soc_codec_driver *driver;
|
|
|
|
driver = NULL;
|
|
if (np) {
|
|
const struct of_device_id *of_id;
|
|
|
|
of_id = of_match_device(ak4642_of_match, &i2c->dev);
|
|
if (of_id)
|
|
driver = of_id->data;
|
|
} else {
|
|
driver = (struct snd_soc_codec_driver *)id->driver_data;
|
|
}
|
|
|
|
if (!driver) {
|
|
dev_err(&i2c->dev, "no driver\n");
|
|
return -EINVAL;
|
|
}
|
|
|
|
return snd_soc_register_codec(&i2c->dev,
|
|
driver, &ak4642_dai, 1);
|
|
}
|
|
|
|
static int ak4642_i2c_remove(struct i2c_client *client)
|
|
{
|
|
snd_soc_unregister_codec(&client->dev);
|
|
return 0;
|
|
}
|
|
|
|
static struct of_device_id ak4642_of_match[] __devinitconst = {
|
|
{ .compatible = "asahi-kasei,ak4642", .data = &soc_codec_dev_ak4642},
|
|
{ .compatible = "asahi-kasei,ak4643", .data = &soc_codec_dev_ak4642},
|
|
{ .compatible = "asahi-kasei,ak4648", .data = &soc_codec_dev_ak4648},
|
|
{},
|
|
};
|
|
MODULE_DEVICE_TABLE(of, ak4642_of_match);
|
|
|
|
static const struct i2c_device_id ak4642_i2c_id[] = {
|
|
{ "ak4642", (kernel_ulong_t)&soc_codec_dev_ak4642 },
|
|
{ "ak4643", (kernel_ulong_t)&soc_codec_dev_ak4642 },
|
|
{ "ak4648", (kernel_ulong_t)&soc_codec_dev_ak4648 },
|
|
{ }
|
|
};
|
|
MODULE_DEVICE_TABLE(i2c, ak4642_i2c_id);
|
|
|
|
static struct i2c_driver ak4642_i2c_driver = {
|
|
.driver = {
|
|
.name = "ak4642-codec",
|
|
.owner = THIS_MODULE,
|
|
.of_match_table = ak4642_of_match,
|
|
},
|
|
.probe = ak4642_i2c_probe,
|
|
.remove = ak4642_i2c_remove,
|
|
.id_table = ak4642_i2c_id,
|
|
};
|
|
#endif
|
|
|
|
static int __init ak4642_modinit(void)
|
|
{
|
|
int ret = 0;
|
|
#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
|
|
ret = i2c_add_driver(&ak4642_i2c_driver);
|
|
#endif
|
|
return ret;
|
|
|
|
}
|
|
module_init(ak4642_modinit);
|
|
|
|
static void __exit ak4642_exit(void)
|
|
{
|
|
#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
|
|
i2c_del_driver(&ak4642_i2c_driver);
|
|
#endif
|
|
|
|
}
|
|
module_exit(ak4642_exit);
|
|
|
|
MODULE_DESCRIPTION("Soc AK4642 driver");
|
|
MODULE_AUTHOR("Kuninori Morimoto <morimoto.kuninori@renesas.com>");
|
|
MODULE_LICENSE("GPL");
|