linux/arch/riscv
Linus Torvalds bb4ed26e7e SoC: Add support for StarFive JH7100 RISC-V SoC
This adds support for the StarFive JH7100, including the necessary
 device drivers and DT files for the BeagleV Starlight prototype
 board, with additional boards to be added later. This SoC promises
 to be the first usable low-cost platform for RISC-V.
 
 I've taken this through the SoC tree in the anticipation of adding
 a few other Arm based SoCs as well, but those did not pass the
 review in time, so it's only this one.
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Merge tag 'newsoc-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull RISC-V SoC updates from Arnd Bergmann:
 "Add support for StarFive JH7100 RISC-V SoC

  This adds support for the StarFive JH7100, including the necessary
  device drivers and DT files for the BeagleV Starlight prototype board,
  with additional boards to be added later. This SoC promises to be the
  first usable low-cost platform for RISC-V.

  I've taken this through the SoC tree in the anticipation of adding a
  few other Arm based SoCs as well, but those did not pass the review in
  time, so it's only this one"

* tag 'newsoc-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
  reset: starfive-jh7100: Fix 32bit compilation
  RISC-V: Add BeagleV Starlight Beta device tree
  RISC-V: Add initial StarFive JH7100 device tree
  serial: 8250_dw: Add StarFive JH7100 quirk
  dt-bindings: serial: snps-dw-apb-uart: Add JH7100 uarts
  pinctrl: starfive: Add pinctrl driver for StarFive SoCs
  dt-bindings: pinctrl: Add StarFive JH7100 bindings
  dt-bindings: pinctrl: Add StarFive pinctrl definitions
  reset: starfive-jh7100: Add StarFive JH7100 reset driver
  dt-bindings: reset: Add Starfive JH7100 reset bindings
  dt-bindings: reset: Add StarFive JH7100 reset definitions
  clk: starfive: Add JH7100 clock generator driver
  dt-bindings: clock: starfive: Add JH7100 bindings
  dt-bindings: clock: starfive: Add JH7100 clock definitions
  dt-bindings: interrupt-controller: Add StarFive JH7100 plic
  dt-bindings: timer: Add StarFive JH7100 clint
  RISC-V: Add StarFive SoC Kconfig option
2022-01-10 08:32:37 -08:00
..
boot SoC: Add support for StarFive JH7100 RISC-V SoC 2022-01-10 08:32:37 -08:00
configs RISC-V: Enable KVM in RV64 and RV32 defconfigs as a module 2021-11-18 22:04:20 -08:00
errata riscv: skip errata_cip_453.o if CONFIG_ERRATA_SIFIVE_CIP_453 is disabled 2021-06-01 21:16:41 -07:00
include Another EFI fix for v5.16 2021-12-27 08:58:35 -08:00
kernel RISC-V Patches for the 5.16 Merge Window, Part 1 2021-11-13 09:15:42 -08:00
kvm KVM: RISC-V: Unmap stage2 mapping when deleting/moving a memslot 2021-11-22 10:36:16 +05:30
lib include/linux/delay.h: replace kernel.h with the necessary inclusions 2021-11-09 10:02:49 -08:00
mm RISC-V Patches for the 5.16 Merge Window, Part 1 2021-11-13 09:15:42 -08:00
net riscv, bpf: Fix RV32 broken build, and silence RV64 warning 2021-11-05 16:52:34 +01:00
Kbuild kbuild: use more subdir- for visiting subdirectories while cleaning 2021-10-24 13:49:46 +09:00
Kconfig RISC-V Patches for the 5.16 Merge Window, Part 1 2021-11-13 09:15:42 -08:00
Kconfig.debug RISC-V: Remove EARLY_PRINTK support 2018-12-17 10:23:46 -08:00
Kconfig.erratas riscv: enable SiFive errata CIP-453 and CIP-1200 Kconfig only if CONFIG_64BIT=y 2021-05-06 09:40:13 -07:00
Kconfig.socs RISC-V: Add StarFive SoC Kconfig option 2021-11-28 20:03:34 +01:00
Makefile riscv: fix building external modules 2021-11-18 23:06:23 -08:00