linux/drivers/gpu/drm/amd/display/dc/inc/hw
Nevenko Stupar ba16b22d42 drm/amd/display: Line Buffer changes
DCN 3x increased Line buffer size for DCHUB latency hiding, from 4 lines
of 4K resolution lines to 5 lines of 4K resolution lines. All Line
Buffer can be used as extended memory for P State change latency hiding.
The maximum number of lines is increased to 32 lines. Finally,
LB_MEMORY_CONFIG_1 (LB memory piece 1) and LB_MEMORY _CONFIG_2 (LB
memory piece 2) are not affected, no change in size, only 3 pieces is
affected, i.e., when all 3 pieces are used in both LB_MEMORY_CONFIG_0
and LB_MEMORY_CONFIG_3 (for 4:2:0) modes.

Reviewed-by: Jun Lei <jun.lei@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Nevenko Stupar <Nevenko.Stupar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-07-23 10:07:58 -04:00
..
abm.h drm/amd/display: Added support for individual control for multiple back-light instances. 2021-05-27 12:24:03 -04:00
audio.h
aux_engine.h
clk_mgr_internal.h drm/amd/display: Round KHz up when calculating clock requests 2021-07-08 15:16:44 -04:00
clk_mgr.h drm/amdgpu/display: fold DRM_AMD_DC_DCN3_1 into DRM_AMD_DC_DCN 2021-06-22 16:51:45 -04:00
dccg.h drm/amdgpu/display: fold DRM_AMD_DC_DCN3_1 into DRM_AMD_DC_DCN 2021-06-22 16:51:45 -04:00
dchubbub.h drm/amd/display: log additional register state for debug 2021-07-21 13:39:25 -04:00
dmcu.h drm/amd/display: Process crc window at DMCU 2021-03-05 15:11:54 -05:00
dpp.h drm/amd/display: Document set RECOUT operation 2021-05-19 22:38:56 -04:00
dsc.h drm/amd/display: add dsc stream overhead for dp only 2021-05-10 18:06:44 -04:00
dwb.h
gpio.h
hubp.h drm/amd/display: Set max TTU on DPG enable 2021-04-09 16:48:53 -04:00
hw_shared.h drm/amd/display: Update link encoder object creation 2021-03-02 14:05:52 -05:00
ipp.h
link_encoder.h drm/amdgpu/display: fold DRM_AMD_DC_DCN3_1 into DRM_AMD_DC_DCN 2021-06-22 16:51:45 -04:00
mcif_wb.h
mem_input.h drm/amdgpu/display: fold DRM_AMD_DC_DCN3_1 into DRM_AMD_DC_DCN 2021-06-22 16:51:45 -04:00
mpc.h drm/amd/display: Refactor visual confirm 2021-06-08 12:18:37 -04:00
opp.h
panel_cntl.h
stream_encoder.h drm/amd/display: Add interface to get Calibrated Avg Level from FIFO 2021-06-15 17:25:41 -04:00
timing_generator.h drm/amdgpu/display: fold DRM_AMD_DC_DCN3_1 into DRM_AMD_DC_DCN 2021-06-22 16:51:45 -04:00
transform.h drm/amd/display: Line Buffer changes 2021-07-23 10:07:58 -04:00
vmid.h