forked from Minki/linux
4f60168252
Implement the exec_mipi_pmic_seq_element callback for the CHT Whiskey Cove PMIC. On some CHT devices this fixes the LCD panel not lighting up when it was not initialized by the GOP, because an external monitor was plugged in and the GOP initialized only the external monitor. Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190107111556.4510-3-hdegoede@redhat.com
287 lines
6.6 KiB
C
287 lines
6.6 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Intel CHT Whiskey Cove PMIC operation region driver
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* Copyright (C) 2017 Hans de Goede <hdegoede@redhat.com>
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*
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* Based on various non upstream patches to support the CHT Whiskey Cove PMIC:
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* Copyright (C) 2013-2015 Intel Corporation. All rights reserved.
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*/
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#include <linux/acpi.h>
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#include <linux/init.h>
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#include <linux/mfd/intel_soc_pmic.h>
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#include <linux/platform_device.h>
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#include <linux/regmap.h>
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#include "intel_pmic.h"
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#define CHT_WC_V1P05A_CTRL 0x6e3b
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#define CHT_WC_V1P15_CTRL 0x6e3c
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#define CHT_WC_V1P05A_VSEL 0x6e3d
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#define CHT_WC_V1P15_VSEL 0x6e3e
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#define CHT_WC_V1P8A_CTRL 0x6e56
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#define CHT_WC_V1P8SX_CTRL 0x6e57
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#define CHT_WC_VDDQ_CTRL 0x6e58
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#define CHT_WC_V1P2A_CTRL 0x6e59
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#define CHT_WC_V1P2SX_CTRL 0x6e5a
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#define CHT_WC_V1P8A_VSEL 0x6e5b
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#define CHT_WC_VDDQ_VSEL 0x6e5c
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#define CHT_WC_V2P8SX_CTRL 0x6e5d
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#define CHT_WC_V3P3A_CTRL 0x6e5e
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#define CHT_WC_V3P3SD_CTRL 0x6e5f
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#define CHT_WC_VSDIO_CTRL 0x6e67
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#define CHT_WC_V3P3A_VSEL 0x6e68
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#define CHT_WC_VPROG1A_CTRL 0x6e90
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#define CHT_WC_VPROG1B_CTRL 0x6e91
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#define CHT_WC_VPROG1F_CTRL 0x6e95
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#define CHT_WC_VPROG2D_CTRL 0x6e99
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#define CHT_WC_VPROG3A_CTRL 0x6e9a
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#define CHT_WC_VPROG3B_CTRL 0x6e9b
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#define CHT_WC_VPROG4A_CTRL 0x6e9c
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#define CHT_WC_VPROG4B_CTRL 0x6e9d
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#define CHT_WC_VPROG4C_CTRL 0x6e9e
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#define CHT_WC_VPROG4D_CTRL 0x6e9f
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#define CHT_WC_VPROG5A_CTRL 0x6ea0
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#define CHT_WC_VPROG5B_CTRL 0x6ea1
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#define CHT_WC_VPROG6A_CTRL 0x6ea2
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#define CHT_WC_VPROG6B_CTRL 0x6ea3
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#define CHT_WC_VPROG1A_VSEL 0x6ec0
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#define CHT_WC_VPROG1B_VSEL 0x6ec1
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#define CHT_WC_V1P8SX_VSEL 0x6ec2
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#define CHT_WC_V1P2SX_VSEL 0x6ec3
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#define CHT_WC_V1P2A_VSEL 0x6ec4
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#define CHT_WC_VPROG1F_VSEL 0x6ec5
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#define CHT_WC_VSDIO_VSEL 0x6ec6
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#define CHT_WC_V2P8SX_VSEL 0x6ec7
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#define CHT_WC_V3P3SD_VSEL 0x6ec8
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#define CHT_WC_VPROG2D_VSEL 0x6ec9
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#define CHT_WC_VPROG3A_VSEL 0x6eca
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#define CHT_WC_VPROG3B_VSEL 0x6ecb
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#define CHT_WC_VPROG4A_VSEL 0x6ecc
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#define CHT_WC_VPROG4B_VSEL 0x6ecd
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#define CHT_WC_VPROG4C_VSEL 0x6ece
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#define CHT_WC_VPROG4D_VSEL 0x6ecf
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#define CHT_WC_VPROG5A_VSEL 0x6ed0
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#define CHT_WC_VPROG5B_VSEL 0x6ed1
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#define CHT_WC_VPROG6A_VSEL 0x6ed2
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#define CHT_WC_VPROG6B_VSEL 0x6ed3
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/*
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* Regulator support is based on the non upstream patch:
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* "regulator: whiskey_cove: implements Whiskey Cove pmic VRF support"
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* https://github.com/intel-aero/meta-intel-aero/blob/master/recipes-kernel/linux/linux-yocto/0019-regulator-whiskey_cove-implements-WhiskeyCove-pmic-V.patch
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*/
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static struct pmic_table power_table[] = {
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{
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.address = 0x0,
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.reg = CHT_WC_V1P8A_CTRL,
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.bit = 0x01,
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}, /* V18A */
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{
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.address = 0x04,
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.reg = CHT_WC_V1P8SX_CTRL,
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.bit = 0x07,
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}, /* V18X */
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{
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.address = 0x08,
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.reg = CHT_WC_VDDQ_CTRL,
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.bit = 0x01,
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}, /* VDDQ */
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{
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.address = 0x0c,
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.reg = CHT_WC_V1P2A_CTRL,
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.bit = 0x07,
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}, /* V12A */
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{
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.address = 0x10,
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.reg = CHT_WC_V1P2SX_CTRL,
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.bit = 0x07,
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}, /* V12X */
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{
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.address = 0x14,
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.reg = CHT_WC_V2P8SX_CTRL,
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.bit = 0x07,
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}, /* V28X */
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{
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.address = 0x18,
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.reg = CHT_WC_V3P3A_CTRL,
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.bit = 0x01,
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}, /* V33A */
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{
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.address = 0x1c,
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.reg = CHT_WC_V3P3SD_CTRL,
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.bit = 0x07,
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}, /* V3SD */
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{
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.address = 0x20,
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.reg = CHT_WC_VSDIO_CTRL,
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.bit = 0x07,
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}, /* VSD */
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/* {
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.address = 0x24,
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.reg = ??,
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.bit = ??,
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}, ** VSW2 */
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/* {
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.address = 0x28,
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.reg = ??,
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.bit = ??,
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}, ** VSW1 */
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/* {
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.address = 0x2c,
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.reg = ??,
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.bit = ??,
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}, ** VUPY */
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/* {
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.address = 0x30,
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.reg = ??,
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.bit = ??,
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}, ** VRSO */
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{
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.address = 0x34,
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.reg = CHT_WC_VPROG1A_CTRL,
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.bit = 0x07,
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}, /* VP1A */
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{
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.address = 0x38,
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.reg = CHT_WC_VPROG1B_CTRL,
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.bit = 0x07,
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}, /* VP1B */
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{
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.address = 0x3c,
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.reg = CHT_WC_VPROG1F_CTRL,
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.bit = 0x07,
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}, /* VP1F */
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{
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.address = 0x40,
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.reg = CHT_WC_VPROG2D_CTRL,
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.bit = 0x07,
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}, /* VP2D */
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{
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.address = 0x44,
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.reg = CHT_WC_VPROG3A_CTRL,
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.bit = 0x07,
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}, /* VP3A */
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{
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.address = 0x48,
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.reg = CHT_WC_VPROG3B_CTRL,
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.bit = 0x07,
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}, /* VP3B */
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{
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.address = 0x4c,
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.reg = CHT_WC_VPROG4A_CTRL,
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.bit = 0x07,
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}, /* VP4A */
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{
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.address = 0x50,
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.reg = CHT_WC_VPROG4B_CTRL,
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.bit = 0x07,
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}, /* VP4B */
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{
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.address = 0x54,
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.reg = CHT_WC_VPROG4C_CTRL,
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.bit = 0x07,
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}, /* VP4C */
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{
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.address = 0x58,
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.reg = CHT_WC_VPROG4D_CTRL,
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.bit = 0x07,
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}, /* VP4D */
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{
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.address = 0x5c,
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.reg = CHT_WC_VPROG5A_CTRL,
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.bit = 0x07,
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}, /* VP5A */
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{
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.address = 0x60,
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.reg = CHT_WC_VPROG5B_CTRL,
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.bit = 0x07,
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}, /* VP5B */
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{
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.address = 0x64,
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.reg = CHT_WC_VPROG6A_CTRL,
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.bit = 0x07,
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}, /* VP6A */
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{
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.address = 0x68,
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.reg = CHT_WC_VPROG6B_CTRL,
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.bit = 0x07,
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}, /* VP6B */
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/* {
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.address = 0x6c,
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.reg = ??,
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.bit = ??,
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} ** VP7A */
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};
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static int intel_cht_wc_pmic_get_power(struct regmap *regmap, int reg,
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int bit, u64 *value)
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{
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int data;
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if (regmap_read(regmap, reg, &data))
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return -EIO;
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*value = (data & bit) ? 1 : 0;
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return 0;
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}
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static int intel_cht_wc_pmic_update_power(struct regmap *regmap, int reg,
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int bitmask, bool on)
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{
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return regmap_update_bits(regmap, reg, bitmask, on ? 1 : 0);
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}
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static int intel_cht_wc_exec_mipi_pmic_seq_element(struct regmap *regmap,
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u16 i2c_client_address,
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u32 reg_address,
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u32 value, u32 mask)
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{
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u32 address;
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if (i2c_client_address > 0xff || reg_address > 0xff) {
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pr_warn("%s warning addresses too big client 0x%x reg 0x%x\n",
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__func__, i2c_client_address, reg_address);
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return -ERANGE;
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}
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address = (i2c_client_address << 8) | reg_address;
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return regmap_update_bits(regmap, address, mask, value);
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}
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/*
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* The thermal table and ops are empty, we do not support the Thermal opregion
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* (DPTF) due to lacking documentation.
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*/
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static struct intel_pmic_opregion_data intel_cht_wc_pmic_opregion_data = {
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.get_power = intel_cht_wc_pmic_get_power,
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.update_power = intel_cht_wc_pmic_update_power,
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.exec_mipi_pmic_seq_element = intel_cht_wc_exec_mipi_pmic_seq_element,
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.power_table = power_table,
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.power_table_count = ARRAY_SIZE(power_table),
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};
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static int intel_cht_wc_pmic_opregion_probe(struct platform_device *pdev)
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{
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struct intel_soc_pmic *pmic = dev_get_drvdata(pdev->dev.parent);
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return intel_pmic_install_opregion_handler(&pdev->dev,
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ACPI_HANDLE(pdev->dev.parent),
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pmic->regmap,
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&intel_cht_wc_pmic_opregion_data);
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}
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static const struct platform_device_id cht_wc_opregion_id_table[] = {
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{ .name = "cht_wcove_region" },
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{},
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};
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static struct platform_driver intel_cht_wc_pmic_opregion_driver = {
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.probe = intel_cht_wc_pmic_opregion_probe,
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.driver = {
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.name = "cht_whiskey_cove_pmic",
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},
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.id_table = cht_wc_opregion_id_table,
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};
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builtin_platform_driver(intel_cht_wc_pmic_opregion_driver);
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