282420eed2
This clock controller use the string comparison method to describe parent
relation between the clocks, which is not optimized. A recent patch [0]
allows parents to be specified without string names or with device-tree
clock name by using a new assignment structure.
Migrate to the new way by using .parent_hws where possible (when parent
clocks are localy declared in the controller) and use .parent_data
otherwise.
Remove clk input helper and all bypass clocks (declared in probe function)
which are no longer used since we are able to use device-tree clock name
directly.
[0] commit fc0c209c14 ("clk: Allow parents to be specified without string names")
Signed-off-by: Alexandre Mergnat <amergnat@baylibre.com>
[jbrunet@baylibre.com: remove CLK_SET_RATE_PARENT from mst muxes]
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
110 lines
2.7 KiB
Plaintext
110 lines
2.7 KiB
Plaintext
# SPDX-License-Identifier: GPL-2.0-only
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config COMMON_CLK_MESON_INPUT
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tristate
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config COMMON_CLK_MESON_REGMAP
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tristate
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select REGMAP
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config COMMON_CLK_MESON_DUALDIV
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tristate
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select COMMON_CLK_MESON_REGMAP
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config COMMON_CLK_MESON_MPLL
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tristate
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select COMMON_CLK_MESON_REGMAP
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config COMMON_CLK_MESON_PHASE
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tristate
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select COMMON_CLK_MESON_REGMAP
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config COMMON_CLK_MESON_PLL
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tristate
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select COMMON_CLK_MESON_REGMAP
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config COMMON_CLK_MESON_SCLK_DIV
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tristate
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select COMMON_CLK_MESON_REGMAP
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config COMMON_CLK_MESON_VID_PLL_DIV
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tristate
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select COMMON_CLK_MESON_REGMAP
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config COMMON_CLK_MESON_AO_CLKC
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tristate
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select COMMON_CLK_MESON_REGMAP
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select COMMON_CLK_MESON_INPUT
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select RESET_CONTROLLER
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config COMMON_CLK_MESON_EE_CLKC
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tristate
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select COMMON_CLK_MESON_REGMAP
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select COMMON_CLK_MESON_INPUT
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config COMMON_CLK_MESON8B
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bool
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depends on ARCH_MESON
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select COMMON_CLK_MESON_REGMAP
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select COMMON_CLK_MESON_MPLL
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select COMMON_CLK_MESON_PLL
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select MFD_SYSCON
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select RESET_CONTROLLER
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help
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Support for the clock controller on AmLogic S802 (Meson8),
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S805 (Meson8b) and S812 (Meson8m2) devices. Say Y if you
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want peripherals and CPU frequency scaling to work.
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config COMMON_CLK_GXBB
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bool
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depends on ARCH_MESON
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select COMMON_CLK_MESON_REGMAP
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select COMMON_CLK_MESON_DUALDIV
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select COMMON_CLK_MESON_VID_PLL_DIV
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select COMMON_CLK_MESON_MPLL
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select COMMON_CLK_MESON_PLL
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select COMMON_CLK_MESON_AO_CLKC
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select COMMON_CLK_MESON_EE_CLKC
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select MFD_SYSCON
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help
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Support for the clock controller on AmLogic S905 devices, aka gxbb.
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Say Y if you want peripherals and CPU frequency scaling to work.
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config COMMON_CLK_AXG
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bool
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depends on ARCH_MESON
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select COMMON_CLK_MESON_REGMAP
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select COMMON_CLK_MESON_DUALDIV
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select COMMON_CLK_MESON_MPLL
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select COMMON_CLK_MESON_PLL
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select COMMON_CLK_MESON_AO_CLKC
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select COMMON_CLK_MESON_EE_CLKC
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select MFD_SYSCON
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help
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Support for the clock controller on AmLogic A113D devices, aka axg.
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Say Y if you want peripherals and CPU frequency scaling to work.
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config COMMON_CLK_AXG_AUDIO
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tristate "Meson AXG Audio Clock Controller Driver"
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depends on ARCH_MESON
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select COMMON_CLK_MESON_REGMAP
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select COMMON_CLK_MESON_PHASE
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select COMMON_CLK_MESON_SCLK_DIV
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select REGMAP_MMIO
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help
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Support for the audio clock controller on AmLogic A113D devices,
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aka axg, Say Y if you want audio subsystem to work.
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config COMMON_CLK_G12A
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bool
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depends on ARCH_MESON
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select COMMON_CLK_MESON_REGMAP
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select COMMON_CLK_MESON_DUALDIV
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select COMMON_CLK_MESON_MPLL
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select COMMON_CLK_MESON_PLL
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select COMMON_CLK_MESON_AO_CLKC
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select COMMON_CLK_MESON_EE_CLKC
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select MFD_SYSCON
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help
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Support for the clock controller on Amlogic S905D2, S905X2 and S905Y2
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devices, aka g12a. Say Y if you want peripherals to work.
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