forked from Minki/linux
5ec7e02854
v2: * Fix error handling after kfd_bind_process_to_device in kfd_ioctl_map_memory_to_gpu v3: * Add ioctl to acquire VM from a DRM FD v4: * Return number of successful map/unmap operations in failure cases * Facilitate partial retry after failed map/unmap * Added comments with parameter descriptions to new APIs * Defined AMDKFD_IOC_FREE_MEMORY_OF_GPU write-only Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
410 lines
13 KiB
C
410 lines
13 KiB
C
/*
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* Copyright 2014 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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/*
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* This file defines the private interface between the
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* AMD kernel graphics drivers and the AMD KFD.
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*/
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#ifndef KGD_KFD_INTERFACE_H_INCLUDED
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#define KGD_KFD_INTERFACE_H_INCLUDED
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#include <linux/types.h>
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#include <linux/bitmap.h>
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#include <linux/dma-fence.h>
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struct pci_dev;
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#define KFD_INTERFACE_VERSION 2
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#define KGD_MAX_QUEUES 128
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struct kfd_dev;
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struct kgd_dev;
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struct kgd_mem;
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enum kfd_preempt_type {
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KFD_PREEMPT_TYPE_WAVEFRONT_DRAIN = 0,
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KFD_PREEMPT_TYPE_WAVEFRONT_RESET,
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};
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struct kfd_cu_info {
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uint32_t num_shader_engines;
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uint32_t num_shader_arrays_per_engine;
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uint32_t num_cu_per_sh;
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uint32_t cu_active_number;
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uint32_t cu_ao_mask;
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uint32_t simd_per_cu;
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uint32_t max_waves_per_simd;
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uint32_t wave_front_size;
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uint32_t max_scratch_slots_per_cu;
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uint32_t lds_size;
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uint32_t cu_bitmap[4][4];
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};
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/* For getting GPU local memory information from KGD */
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struct kfd_local_mem_info {
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uint64_t local_mem_size_private;
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uint64_t local_mem_size_public;
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uint32_t vram_width;
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uint32_t mem_clk_max;
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};
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enum kgd_memory_pool {
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KGD_POOL_SYSTEM_CACHEABLE = 1,
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KGD_POOL_SYSTEM_WRITECOMBINE = 2,
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KGD_POOL_FRAMEBUFFER = 3,
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};
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enum kgd_engine_type {
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KGD_ENGINE_PFP = 1,
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KGD_ENGINE_ME,
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KGD_ENGINE_CE,
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KGD_ENGINE_MEC1,
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KGD_ENGINE_MEC2,
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KGD_ENGINE_RLC,
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KGD_ENGINE_SDMA1,
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KGD_ENGINE_SDMA2,
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KGD_ENGINE_MAX
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};
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struct kgd2kfd_shared_resources {
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/* Bit n == 1 means VMID n is available for KFD. */
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unsigned int compute_vmid_bitmap;
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/* number of pipes per mec */
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uint32_t num_pipe_per_mec;
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/* number of queues per pipe */
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uint32_t num_queue_per_pipe;
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/* Bit n == 1 means Queue n is available for KFD */
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DECLARE_BITMAP(queue_bitmap, KGD_MAX_QUEUES);
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/* Base address of doorbell aperture. */
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phys_addr_t doorbell_physical_address;
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/* Size in bytes of doorbell aperture. */
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size_t doorbell_aperture_size;
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/* Number of bytes at start of aperture reserved for KGD. */
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size_t doorbell_start_offset;
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/* GPUVM address space size in bytes */
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uint64_t gpuvm_size;
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/* Minor device number of the render node */
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int drm_render_minor;
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};
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struct tile_config {
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uint32_t *tile_config_ptr;
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uint32_t *macro_tile_config_ptr;
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uint32_t num_tile_configs;
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uint32_t num_macro_tile_configs;
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uint32_t gb_addr_config;
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uint32_t num_banks;
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uint32_t num_ranks;
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};
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/*
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* Allocation flag domains
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* NOTE: This must match the corresponding definitions in kfd_ioctl.h.
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*/
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#define ALLOC_MEM_FLAGS_VRAM (1 << 0)
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#define ALLOC_MEM_FLAGS_GTT (1 << 1)
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#define ALLOC_MEM_FLAGS_USERPTR (1 << 2) /* TODO */
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#define ALLOC_MEM_FLAGS_DOORBELL (1 << 3) /* TODO */
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/*
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* Allocation flags attributes/access options.
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* NOTE: This must match the corresponding definitions in kfd_ioctl.h.
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*/
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#define ALLOC_MEM_FLAGS_WRITABLE (1 << 31)
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#define ALLOC_MEM_FLAGS_EXECUTABLE (1 << 30)
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#define ALLOC_MEM_FLAGS_PUBLIC (1 << 29)
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#define ALLOC_MEM_FLAGS_NO_SUBSTITUTE (1 << 28) /* TODO */
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#define ALLOC_MEM_FLAGS_AQL_QUEUE_MEM (1 << 27)
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#define ALLOC_MEM_FLAGS_COHERENT (1 << 26) /* For GFXv9 or later */
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/**
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* struct kfd2kgd_calls
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*
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* @init_gtt_mem_allocation: Allocate a buffer on the gart aperture.
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* The buffer can be used for mqds, hpds, kernel queue, fence and runlists
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*
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* @free_gtt_mem: Frees a buffer that was allocated on the gart aperture
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*
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* @get_local_mem_info: Retrieves information about GPU local memory
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*
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* @get_gpu_clock_counter: Retrieves GPU clock counter
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*
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* @get_max_engine_clock_in_mhz: Retrieves maximum GPU clock in MHz
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*
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* @alloc_pasid: Allocate a PASID
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* @free_pasid: Free a PASID
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*
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* @program_sh_mem_settings: A function that should initiate the memory
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* properties such as main aperture memory type (cache / non cached) and
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* secondary aperture base address, size and memory type.
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* This function is used only for no cp scheduling mode.
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*
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* @set_pasid_vmid_mapping: Exposes pasid/vmid pair to the H/W for no cp
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* scheduling mode. Only used for no cp scheduling mode.
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*
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* @init_pipeline: Initialized the compute pipelines.
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*
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* @hqd_load: Loads the mqd structure to a H/W hqd slot. used only for no cp
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* sceduling mode.
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*
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* @hqd_sdma_load: Loads the SDMA mqd structure to a H/W SDMA hqd slot.
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* used only for no HWS mode.
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*
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* @hqd_dump: Dumps CPC HQD registers to an array of address-value pairs.
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* Array is allocated with kmalloc, needs to be freed with kfree by caller.
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*
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* @hqd_sdma_dump: Dumps SDMA HQD registers to an array of address-value pairs.
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* Array is allocated with kmalloc, needs to be freed with kfree by caller.
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*
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* @hqd_is_occupies: Checks if a hqd slot is occupied.
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*
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* @hqd_destroy: Destructs and preempts the queue assigned to that hqd slot.
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*
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* @hqd_sdma_is_occupied: Checks if an SDMA hqd slot is occupied.
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*
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* @hqd_sdma_destroy: Destructs and preempts the SDMA queue assigned to that
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* SDMA hqd slot.
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*
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* @get_fw_version: Returns FW versions from the header
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*
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* @set_scratch_backing_va: Sets VA for scratch backing memory of a VMID.
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* Only used for no cp scheduling mode
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*
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* @get_tile_config: Returns GPU-specific tiling mode information
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*
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* @get_cu_info: Retrieves activated cu info
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*
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* @get_vram_usage: Returns current VRAM usage
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*
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* @create_process_vm: Create a VM address space for a given process and GPU
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*
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* @destroy_process_vm: Destroy a VM
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*
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* @get_process_page_dir: Get physical address of a VM page directory
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*
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* @set_vm_context_page_table_base: Program page table base for a VMID
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*
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* @alloc_memory_of_gpu: Allocate GPUVM memory
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*
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* @free_memory_of_gpu: Free GPUVM memory
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*
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* @map_memory_to_gpu: Map GPUVM memory into a specific VM address
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* space. Allocates and updates page tables and page directories as
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* needed. This function may return before all page table updates have
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* completed. This allows multiple map operations (on multiple GPUs)
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* to happen concurrently. Use sync_memory to synchronize with all
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* pending updates.
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*
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* @unmap_memor_to_gpu: Unmap GPUVM memory from a specific VM address space
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*
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* @sync_memory: Wait for pending page table updates to complete
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*
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* @map_gtt_bo_to_kernel: Map a GTT BO for kernel access
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* Pins the BO, maps it to kernel address space. Such BOs are never evicted.
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* The kernel virtual address remains valid until the BO is freed.
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*
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* @restore_process_bos: Restore all BOs that belong to the
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* process. This is intended for restoring memory mappings after a TTM
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* eviction.
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*
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* @invalidate_tlbs: Invalidate TLBs for a specific PASID
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*
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* @invalidate_tlbs_vmid: Invalidate TLBs for a specific VMID
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*
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* @submit_ib: Submits an IB to the engine specified by inserting the
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* IB to the corresponding ring (ring type). The IB is executed with the
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* specified VMID in a user mode context.
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*
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* This structure contains function pointers to services that the kgd driver
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* provides to amdkfd driver.
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*
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*/
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struct kfd2kgd_calls {
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int (*init_gtt_mem_allocation)(struct kgd_dev *kgd, size_t size,
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void **mem_obj, uint64_t *gpu_addr,
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void **cpu_ptr);
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void (*free_gtt_mem)(struct kgd_dev *kgd, void *mem_obj);
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void (*get_local_mem_info)(struct kgd_dev *kgd,
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struct kfd_local_mem_info *mem_info);
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uint64_t (*get_gpu_clock_counter)(struct kgd_dev *kgd);
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uint32_t (*get_max_engine_clock_in_mhz)(struct kgd_dev *kgd);
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int (*alloc_pasid)(unsigned int bits);
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void (*free_pasid)(unsigned int pasid);
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/* Register access functions */
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void (*program_sh_mem_settings)(struct kgd_dev *kgd, uint32_t vmid,
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uint32_t sh_mem_config, uint32_t sh_mem_ape1_base,
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uint32_t sh_mem_ape1_limit, uint32_t sh_mem_bases);
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int (*set_pasid_vmid_mapping)(struct kgd_dev *kgd, unsigned int pasid,
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unsigned int vmid);
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int (*init_pipeline)(struct kgd_dev *kgd, uint32_t pipe_id,
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uint32_t hpd_size, uint64_t hpd_gpu_addr);
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int (*init_interrupts)(struct kgd_dev *kgd, uint32_t pipe_id);
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int (*hqd_load)(struct kgd_dev *kgd, void *mqd, uint32_t pipe_id,
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uint32_t queue_id, uint32_t __user *wptr,
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uint32_t wptr_shift, uint32_t wptr_mask,
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struct mm_struct *mm);
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int (*hqd_sdma_load)(struct kgd_dev *kgd, void *mqd,
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uint32_t __user *wptr, struct mm_struct *mm);
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int (*hqd_dump)(struct kgd_dev *kgd,
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uint32_t pipe_id, uint32_t queue_id,
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uint32_t (**dump)[2], uint32_t *n_regs);
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int (*hqd_sdma_dump)(struct kgd_dev *kgd,
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uint32_t engine_id, uint32_t queue_id,
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uint32_t (**dump)[2], uint32_t *n_regs);
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bool (*hqd_is_occupied)(struct kgd_dev *kgd, uint64_t queue_address,
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uint32_t pipe_id, uint32_t queue_id);
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int (*hqd_destroy)(struct kgd_dev *kgd, void *mqd, uint32_t reset_type,
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unsigned int timeout, uint32_t pipe_id,
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uint32_t queue_id);
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bool (*hqd_sdma_is_occupied)(struct kgd_dev *kgd, void *mqd);
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int (*hqd_sdma_destroy)(struct kgd_dev *kgd, void *mqd,
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unsigned int timeout);
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int (*address_watch_disable)(struct kgd_dev *kgd);
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int (*address_watch_execute)(struct kgd_dev *kgd,
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unsigned int watch_point_id,
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uint32_t cntl_val,
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uint32_t addr_hi,
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uint32_t addr_lo);
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int (*wave_control_execute)(struct kgd_dev *kgd,
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uint32_t gfx_index_val,
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uint32_t sq_cmd);
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uint32_t (*address_watch_get_offset)(struct kgd_dev *kgd,
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unsigned int watch_point_id,
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unsigned int reg_offset);
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bool (*get_atc_vmid_pasid_mapping_valid)(
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struct kgd_dev *kgd,
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uint8_t vmid);
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uint16_t (*get_atc_vmid_pasid_mapping_pasid)(
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struct kgd_dev *kgd,
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uint8_t vmid);
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uint16_t (*get_fw_version)(struct kgd_dev *kgd,
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enum kgd_engine_type type);
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void (*set_scratch_backing_va)(struct kgd_dev *kgd,
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uint64_t va, uint32_t vmid);
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int (*get_tile_config)(struct kgd_dev *kgd, struct tile_config *config);
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void (*get_cu_info)(struct kgd_dev *kgd,
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struct kfd_cu_info *cu_info);
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uint64_t (*get_vram_usage)(struct kgd_dev *kgd);
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int (*create_process_vm)(struct kgd_dev *kgd, void **vm,
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void **process_info, struct dma_fence **ef);
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int (*acquire_process_vm)(struct kgd_dev *kgd, struct file *filp,
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void **vm, void **process_info, struct dma_fence **ef);
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void (*destroy_process_vm)(struct kgd_dev *kgd, void *vm);
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uint32_t (*get_process_page_dir)(void *vm);
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void (*set_vm_context_page_table_base)(struct kgd_dev *kgd,
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uint32_t vmid, uint32_t page_table_base);
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int (*alloc_memory_of_gpu)(struct kgd_dev *kgd, uint64_t va,
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uint64_t size, void *vm,
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struct kgd_mem **mem, uint64_t *offset,
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uint32_t flags);
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int (*free_memory_of_gpu)(struct kgd_dev *kgd, struct kgd_mem *mem);
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int (*map_memory_to_gpu)(struct kgd_dev *kgd, struct kgd_mem *mem,
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void *vm);
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int (*unmap_memory_to_gpu)(struct kgd_dev *kgd, struct kgd_mem *mem,
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void *vm);
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int (*sync_memory)(struct kgd_dev *kgd, struct kgd_mem *mem, bool intr);
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int (*map_gtt_bo_to_kernel)(struct kgd_dev *kgd, struct kgd_mem *mem,
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void **kptr, uint64_t *size);
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int (*restore_process_bos)(void *process_info, struct dma_fence **ef);
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int (*invalidate_tlbs)(struct kgd_dev *kgd, uint16_t pasid);
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int (*invalidate_tlbs_vmid)(struct kgd_dev *kgd, uint16_t vmid);
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int (*submit_ib)(struct kgd_dev *kgd, enum kgd_engine_type engine,
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uint32_t vmid, uint64_t gpu_addr,
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uint32_t *ib_cmd, uint32_t ib_len);
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};
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/**
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* struct kgd2kfd_calls
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*
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* @exit: Notifies amdkfd that kgd module is unloaded
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*
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* @probe: Notifies amdkfd about a probe done on a device in the kgd driver.
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*
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* @device_init: Initialize the newly probed device (if it is a device that
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* amdkfd supports)
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*
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* @device_exit: Notifies amdkfd about a removal of a kgd device
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*
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* @suspend: Notifies amdkfd about a suspend action done to a kgd device
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*
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* @resume: Notifies amdkfd about a resume action done to a kgd device
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*
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* @schedule_evict_and_restore_process: Schedules work queue that will prepare
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* for safe eviction of KFD BOs that belong to the specified process.
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*
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* This structure contains function callback pointers so the kgd driver
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* will notify to the amdkfd about certain status changes.
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*
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*/
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struct kgd2kfd_calls {
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void (*exit)(void);
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struct kfd_dev* (*probe)(struct kgd_dev *kgd, struct pci_dev *pdev,
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const struct kfd2kgd_calls *f2g);
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bool (*device_init)(struct kfd_dev *kfd,
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const struct kgd2kfd_shared_resources *gpu_resources);
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void (*device_exit)(struct kfd_dev *kfd);
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void (*interrupt)(struct kfd_dev *kfd, const void *ih_ring_entry);
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void (*suspend)(struct kfd_dev *kfd);
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int (*resume)(struct kfd_dev *kfd);
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int (*schedule_evict_and_restore_process)(struct mm_struct *mm,
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struct dma_fence *fence);
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};
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int kgd2kfd_init(unsigned interface_version,
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const struct kgd2kfd_calls **g2f);
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#endif /* KGD_KFD_INTERFACE_H_INCLUDED */
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