Vineet Gupta 6de7abfbad ARCv2: [axs103_smp] Reduce clk for Quad FPGA configs ... Signed-off-by: Vineet Gupta <vgupta@synopsys.com>		2015-08-04 09:26:30 +05:30
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axs10x.c	ARCv2: [axs103_smp] Reduce clk for Quad FPGA configs	2015-08-04 09:26:30 +05:30
Kconfig	ARCv2: [axs103] Support ARC SDP FPGA platform for HS38x cores	2015-06-25 06:00:20 +05:30
Makefile	ARC: [axs101] Add support for AXS101 SDP (software development platform)	2015-06-19 18:09:30 +05:30