forked from Minki/linux
b77fb7faa9
Simplify the UART setup code so that it no longer loops for each UART present. Just make it do all the work it needs in a single function. This will make the code easier to share when we move to a single set of platform data for ColdFire UARTs. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
115 lines
3.0 KiB
C
115 lines
3.0 KiB
C
/***************************************************************************/
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/*
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* linux/arch/m68knommu/platform/5407/config.c
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*
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* Copyright (C) 1999-2002, Greg Ungerer (gerg@snapgear.com)
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* Copyright (C) 2000, Lineo (www.lineo.com)
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*/
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/***************************************************************************/
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#include <linux/kernel.h>
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#include <linux/param.h>
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#include <linux/init.h>
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#include <linux/io.h>
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#include <asm/machdep.h>
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#include <asm/coldfire.h>
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#include <asm/mcfsim.h>
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#include <asm/mcfuart.h>
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/***************************************************************************/
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static struct mcf_platform_uart m5407_uart_platform[] = {
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{
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.mapbase = MCFUART_BASE0,
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.irq = MCF_IRQ_UART0,
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},
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{
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.mapbase = MCFUART_BASE1,
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.irq = MCF_IRQ_UART1,
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},
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{ },
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};
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static struct platform_device m5407_uart = {
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.name = "mcfuart",
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.id = 0,
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.dev.platform_data = m5407_uart_platform,
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};
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static struct platform_device *m5407_devices[] __initdata = {
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&m5407_uart,
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};
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/***************************************************************************/
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static void __init m5407_uarts_init(void)
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{
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/* UART0 interrupt setup */
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writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR);
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writeb(MCF_IRQ_UART0, MCFUART_BASE0 + MCFUART_UIVR);
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mcf_mapirq2imr(MCF_IRQ_UART0, MCFINTC_UART0);
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/* UART1 interrupt setup */
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writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR);
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writeb(MCF_IRQ_UART1, MCFUART_BASE1 + MCFUART_UIVR);
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mcf_mapirq2imr(MCF_IRQ_UART1, MCFINTC_UART1);
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}
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/***************************************************************************/
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static void __init m5407_timers_init(void)
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{
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/* Timer1 is always used as system timer */
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writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI3,
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MCF_MBAR + MCFSIM_TIMER1ICR);
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mcf_mapirq2imr(MCF_IRQ_TIMER, MCFINTC_TIMER1);
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#ifdef CONFIG_HIGHPROFILE
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/* Timer2 is to be used as a high speed profile timer */
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writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL7 | MCFSIM_ICR_PRI3,
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MCF_MBAR + MCFSIM_TIMER2ICR);
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mcf_mapirq2imr(MCF_IRQ_PROFILER, MCFINTC_TIMER2);
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#endif
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}
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/***************************************************************************/
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void m5407_cpu_reset(void)
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{
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local_irq_disable();
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/* set watchdog to soft reset, and enabled */
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__raw_writeb(0xc0, MCF_MBAR + MCFSIM_SYPCR);
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for (;;)
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/* wait for watchdog to timeout */;
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}
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/***************************************************************************/
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void __init config_BSP(char *commandp, int size)
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{
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mach_reset = m5407_cpu_reset;
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mach_sched_init = hw_timer_init;
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m5407_timers_init();
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m5407_uarts_init();
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/* Only support the external interrupts on their primary level */
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mcf_mapirq2imr(25, MCFINTC_EINT1);
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mcf_mapirq2imr(27, MCFINTC_EINT3);
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mcf_mapirq2imr(29, MCFINTC_EINT5);
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mcf_mapirq2imr(31, MCFINTC_EINT7);
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}
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/***************************************************************************/
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static int __init init_BSP(void)
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{
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platform_add_devices(m5407_devices, ARRAY_SIZE(m5407_devices));
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return 0;
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}
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arch_initcall(init_BSP);
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/***************************************************************************/
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