forked from Minki/linux
d2ae2e20fb
Freescale IFC controller has been used for mpc8xxx. It will be used for ARM-based SoC as well. This patch moves the driver to driver/memory and fix the header file includes. Also remove module_platform_driver() and instead call platform_driver_register() from subsys_initcall() to make sure this module has been loaded before MTD partition parsing starts. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
80 lines
2.2 KiB
Plaintext
80 lines
2.2 KiB
Plaintext
Integrated Flash Controller
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Properties:
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- name : Should be ifc
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- compatible : should contain "fsl,ifc". The version of the integrated
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flash controller can be found in the IFC_REV register at
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offset zero.
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- #address-cells : Should be either two or three. The first cell is the
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chipselect number, and the remaining cells are the
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offset into the chipselect.
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- #size-cells : Either one or two, depending on how large each chipselect
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can be.
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- reg : Offset and length of the register set for the device
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- interrupts: IFC may have one or two interrupts. If two interrupt
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specifiers are present, the first is the "common"
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interrupt (CM_EVTER_STAT), and the second is the NAND
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interrupt (NAND_EVTER_STAT). If there is only one,
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that interrupt reports both types of event.
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- ranges : Each range corresponds to a single chipselect, and covers
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the entire access window as configured.
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Child device nodes describe the devices connected to IFC such as NOR (e.g.
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cfi-flash) and NAND (fsl,ifc-nand). There might be board specific devices
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like FPGAs, CPLDs, etc.
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Example:
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ifc@ffe1e000 {
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compatible = "fsl,ifc", "simple-bus";
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#address-cells = <2>;
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#size-cells = <1>;
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reg = <0x0 0xffe1e000 0 0x2000>;
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interrupts = <16 2 19 2>;
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/* NOR, NAND Flashes and CPLD on board */
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ranges = <0x0 0x0 0x0 0xee000000 0x02000000
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0x1 0x0 0x0 0xffa00000 0x00010000
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0x3 0x0 0x0 0xffb00000 0x00020000>;
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flash@0,0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "cfi-flash";
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reg = <0x0 0x0 0x2000000>;
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bank-width = <2>;
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device-width = <1>;
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partition@0 {
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/* 32MB for user data */
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reg = <0x0 0x02000000>;
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label = "NOR Data";
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};
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};
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flash@1,0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "fsl,ifc-nand";
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reg = <0x1 0x0 0x10000>;
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partition@0 {
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/* This location must not be altered */
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/* 1MB for u-boot Bootloader Image */
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reg = <0x0 0x00100000>;
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label = "NAND U-Boot Image";
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read-only;
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};
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};
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cpld@3,0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "fsl,p1010rdb-cpld";
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reg = <0x3 0x0 0x000001f>;
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};
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};
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