The hold field allows to configure the data hold time which can be set with the help of the generic binding 'i2c-sda-hold-time-ns'. This feature has been introduced with SAMA5D4 SoC family. Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
		
			
				
	
	
		
			64 lines
		
	
	
		
			1.7 KiB
		
	
	
	
		
			Plaintext
		
	
	
	
	
	
			
		
		
	
	
			64 lines
		
	
	
		
			1.7 KiB
		
	
	
	
		
			Plaintext
		
	
	
	
	
	
| I2C for Atmel platforms
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| 
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| Required properties :
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| - compatible : Must be "atmel,at91rm9200-i2c", "atmel,at91sam9261-i2c",
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|      "atmel,at91sam9260-i2c", "atmel,at91sam9g20-i2c", "atmel,at91sam9g10-i2c",
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|      "atmel,at91sam9x5-i2c", "atmel,sama5d4-i2c" or "atmel,sama5d2-i2c"
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| - reg: physical base address of the controller and length of memory mapped
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|      region.
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| - interrupts: interrupt number to the cpu.
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| - #address-cells = <1>;
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| - #size-cells = <0>;
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| - clocks: phandles to input clocks.
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| 
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| Optional properties:
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| - clock-frequency: Desired I2C bus frequency in Hz, otherwise defaults to 100000
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| - dmas: A list of two dma specifiers, one for each entry in dma-names.
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| - dma-names: should contain "tx" and "rx".
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| - atmel,fifo-size: maximum number of data the RX and TX FIFOs can store for FIFO
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|   capable I2C controllers.
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| - i2c-sda-hold-time-ns: TWD hold time, only available for "atmel,sama5d4-i2c"
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|   and "atmel,sama5d2-i2c".
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| - Child nodes conforming to i2c bus binding
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| 
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| Examples :
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| 
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| i2c0: i2c@fff84000 {
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| 	compatible = "atmel,at91sam9g20-i2c";
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| 	reg = <0xfff84000 0x100>;
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| 	interrupts = <12 4 6>;
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| 	#address-cells = <1>;
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| 	#size-cells = <0>;
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| 	clocks = <&twi0_clk>;
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| 	clock-frequency = <400000>;
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| 
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| 	24c512@50 {
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| 		compatible = "24c512";
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| 		reg = <0x50>;
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| 		pagesize = <128>;
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| 	}
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| }
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| 
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| i2c0: i2c@f8034600 {
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| 	compatible = "atmel,sama5d2-i2c";
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| 	reg = <0xf8034600 0x100>;
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| 	interrupts = <19 IRQ_TYPE_LEVEL_HIGH 7>;
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| 	dmas = <&dma0
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| 		(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1))
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| 		AT91_XDMAC_DT_PERID(11)>,
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| 	       <&dma0
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| 		(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1))
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| 		AT91_XDMAC_DT_PERID(12)>;
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| 	dma-names = "tx", "rx";
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| 	#address-cells = <1>;
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| 	#size-cells = <0>;
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| 	clocks = <&flx0>;
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| 	atmel,fifo-size = <16>;
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| 	i2c-sda-hold-time-ns = <336>;
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| 
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| 	wm8731: wm8731@1a {
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| 		compatible = "wm8731";
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| 		reg = <0x1a>;
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| 	};
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| };
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