Krzysztof Kozlowski 2867b9746c clk: socfpga: fix iomem pointer cast on 64-bit ... Pointers should be cast with uintptr_t instead of integer. This fixes warning when compile testing on ARM64: drivers/clk/socfpga/clk-gate.c: In function ‘socfpga_clk_recalc_rate’: drivers/clk/socfpga/clk-gate.c:102:7: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] Fixes: b7cec13f08 ("clk: socfpga: Look for the GPIO_DB_CLK by its offset") Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Acked-by: Dinh Nguyen <dinguyen@kernel.org> Link: https://lore.kernel.org/r/20210314110709.32599-1-krzysztof.kozlowski@canonical.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>		2021-03-29 12:04:38 -07:00
..
clk-agilex.c	clk: socfpga: agilex: add clock driver for eASIC N5X platform	2021-02-12 13:04:58 -08:00
clk-gate-a10.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 201	2019-05-30 11:29:52 -07:00
clk-gate-s10.c	clk: socfpga: stratix10: use new parent data scheme	2020-05-26 19:13:05 -07:00
clk-gate.c	clk: socfpga: fix iomem pointer cast on 64-bit	2021-03-29 12:04:38 -07:00
clk-periph-a10.c	clk: socfpga: Don't reference clk_init_data after registration	2019-08-16 10:20:07 -07:00
clk-periph-s10.c	clk: socfpga: agilex: add clock driver for eASIC N5X platform	2021-02-12 13:04:58 -08:00
clk-periph.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157	2019-05-30 11:26:37 -07:00
clk-pll-a10.c	clk: socfpga: clk-pll-a10: Remove set but unused variable 'rc'	2021-02-11 11:56:06 -08:00
clk-pll-s10.c	clk: socfpga: agilex: add clock driver for eASIC N5X platform	2021-02-12 13:04:58 -08:00
clk-pll.c	clk: socfpga: clk-pll: Remove unused variable 'rc'	2021-02-11 11:56:06 -08:00
clk-s10.c	clk: socfpga: stratix10: fix the divider for the emac_ptp_free_clk	2020-09-22 12:54:41 -07:00
clk.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 13	2019-05-21 11:28:45 +02:00
clk.h	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 288	2019-06-05 17:36:37 +02:00
Makefile	clk: socfpga: agilex: add clock driver for the Agilex platform	2020-05-26 19:13:05 -07:00
stratix10-clk.h	clk: socfpga: agilex: add clock driver for eASIC N5X platform	2021-02-12 13:04:58 -08:00