Michael Strauss 72f5b5a308 drm/amd/display: Check for null fclk voltage when parsing clock table ... [WHY] In cases where a clock table is malformed such that fclk entries have frequencies but not voltages listed, we don't catch the error and set clocks to 0 instead of using hardcoded values as we should. [HOW] Add check for clock tables fclk entry's voltage as well Signed-off-by: Michael Strauss <michael.strauss@amd.com> Reviewed-by: Eric Yang <eric.yang2@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org		2020-04-07 14:22:10 -04:00
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rn_clk_mgr_vbios_smu.c	drm/amd/display: rename core_dc to dc	2019-12-05 16:26:39 -05:00
rn_clk_mgr_vbios_smu.h	drm/amd/display: fix code to control 48mhz refclk	2019-10-10 19:33:15 -05:00
rn_clk_mgr.c	drm/amd/display: Check for null fclk voltage when parsing clock table	2020-04-07 14:22:10 -04:00
rn_clk_mgr.h	drm/amd/display: move dispclk vco freq to clk mgr base	2019-10-25 16:50:08 -04:00