b64955a929
In preparation for implementing a unit test backend transport for ioctl operations, and making the mailbox available to the cxl/pmem infrastructure, move the existing PCI specific portion of mailbox handling to an "mbox_send" operation. With this split all the PCI-specific transport details are comprehended by a single operation and the rest of the mailbox infrastructure is 'struct cxl_mem' and 'struct cxl_memdev' generic. Acked-by: Ben Widawsky <ben.widawsky@intel.com> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Reviewed-by: Ben Widawsky <ben.widawsky@intel.com> Link: https://lore.kernel.org/r/163116434098.2460985.9004760022659400540.stgit@dwillia2-desk3.amr.corp.intel.com Signed-off-by: Dan Williams <dan.j.williams@intel.com>
162 lines
5.7 KiB
C
162 lines
5.7 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/* Copyright(c) 2020-2021 Intel Corporation. */
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#ifndef __CXL_MEM_H__
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#define __CXL_MEM_H__
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#include <linux/cdev.h>
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#include "cxl.h"
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/* CXL 2.0 8.2.8.5.1.1 Memory Device Status Register */
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#define CXLMDEV_STATUS_OFFSET 0x0
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#define CXLMDEV_DEV_FATAL BIT(0)
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#define CXLMDEV_FW_HALT BIT(1)
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#define CXLMDEV_STATUS_MEDIA_STATUS_MASK GENMASK(3, 2)
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#define CXLMDEV_MS_NOT_READY 0
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#define CXLMDEV_MS_READY 1
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#define CXLMDEV_MS_ERROR 2
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#define CXLMDEV_MS_DISABLED 3
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#define CXLMDEV_READY(status) \
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(FIELD_GET(CXLMDEV_STATUS_MEDIA_STATUS_MASK, status) == \
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CXLMDEV_MS_READY)
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#define CXLMDEV_MBOX_IF_READY BIT(4)
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#define CXLMDEV_RESET_NEEDED_MASK GENMASK(7, 5)
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#define CXLMDEV_RESET_NEEDED_NOT 0
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#define CXLMDEV_RESET_NEEDED_COLD 1
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#define CXLMDEV_RESET_NEEDED_WARM 2
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#define CXLMDEV_RESET_NEEDED_HOT 3
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#define CXLMDEV_RESET_NEEDED_CXL 4
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#define CXLMDEV_RESET_NEEDED(status) \
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(FIELD_GET(CXLMDEV_RESET_NEEDED_MASK, status) != \
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CXLMDEV_RESET_NEEDED_NOT)
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/**
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* struct cdevm_file_operations - devm coordinated cdev file operations
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* @fops: file operations that are synchronized against @shutdown
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* @shutdown: disconnect driver data
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*
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* @shutdown is invoked in the devres release path to disconnect any
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* driver instance data from @dev. It assumes synchronization with any
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* fops operation that requires driver data. After @shutdown an
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* operation may only reference @device data.
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*/
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struct cdevm_file_operations {
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struct file_operations fops;
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void (*shutdown)(struct device *dev);
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};
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/**
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* struct cxl_memdev - CXL bus object representing a Type-3 Memory Device
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* @dev: driver core device object
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* @cdev: char dev core object for ioctl operations
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* @cxlm: pointer to the parent device driver data
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* @id: id number of this memdev instance.
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*/
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struct cxl_memdev {
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struct device dev;
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struct cdev cdev;
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struct cxl_mem *cxlm;
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int id;
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};
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static inline struct cxl_memdev *to_cxl_memdev(struct device *dev)
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{
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return container_of(dev, struct cxl_memdev, dev);
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}
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struct cxl_memdev *
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devm_cxl_add_memdev(struct cxl_mem *cxlm,
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const struct cdevm_file_operations *cdevm_fops);
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/**
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* struct cxl_mbox_cmd - A command to be submitted to hardware.
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* @opcode: (input) The command set and command submitted to hardware.
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* @payload_in: (input) Pointer to the input payload.
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* @payload_out: (output) Pointer to the output payload. Must be allocated by
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* the caller.
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* @size_in: (input) Number of bytes to load from @payload_in.
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* @size_out: (input) Max number of bytes loaded into @payload_out.
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* (output) Number of bytes generated by the device. For fixed size
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* outputs commands this is always expected to be deterministic. For
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* variable sized output commands, it tells the exact number of bytes
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* written.
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* @return_code: (output) Error code returned from hardware.
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*
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* This is the primary mechanism used to send commands to the hardware.
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* All the fields except @payload_* correspond exactly to the fields described in
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* Command Register section of the CXL 2.0 8.2.8.4.5. @payload_in and
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* @payload_out are written to, and read from the Command Payload Registers
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* defined in CXL 2.0 8.2.8.4.8.
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*/
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struct cxl_mbox_cmd {
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u16 opcode;
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void *payload_in;
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void *payload_out;
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size_t size_in;
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size_t size_out;
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u16 return_code;
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#define CXL_MBOX_SUCCESS 0
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};
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/*
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* CXL 2.0 - Memory capacity multiplier
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* See Section 8.2.9.5
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*
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* Volatile, Persistent, and Partition capacities are specified to be in
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* multiples of 256MB - define a multiplier to convert to/from bytes.
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*/
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#define CXL_CAPACITY_MULTIPLIER SZ_256M
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/**
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* struct cxl_mem - A CXL memory device
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* @dev: The device associated with this CXL device.
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* @cxlmd: Logical memory device chardev / interface
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* @regs: Parsed register blocks
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* @payload_size: Size of space for payload
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* (CXL 2.0 8.2.8.4.3 Mailbox Capabilities Register)
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* @lsa_size: Size of Label Storage Area
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* (CXL 2.0 8.2.9.5.1.1 Identify Memory Device)
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* @mbox_mutex: Mutex to synchronize mailbox access.
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* @firmware_version: Firmware version for the memory device.
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* @enabled_cmds: Hardware commands found enabled in CEL.
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* @pmem_range: Active Persistent memory capacity configuration
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* @ram_range: Active Volatile memory capacity configuration
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* @total_bytes: sum of all possible capacities
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* @volatile_only_bytes: hard volatile capacity
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* @persistent_only_bytes: hard persistent capacity
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* @partition_align_bytes: alignment size for partition-able capacity
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* @active_volatile_bytes: sum of hard + soft volatile
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* @active_persistent_bytes: sum of hard + soft persistent
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* @next_volatile_bytes: volatile capacity change pending device reset
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* @next_persistent_bytes: persistent capacity change pending device reset
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* @mbox_send: @dev specific transport for transmitting mailbox commands
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*
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* See section 8.2.9.5.2 Capacity Configuration and Label Storage for
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* details on capacity parameters.
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*/
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struct cxl_mem {
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struct device *dev;
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struct cxl_memdev *cxlmd;
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struct cxl_regs regs;
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size_t payload_size;
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size_t lsa_size;
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struct mutex mbox_mutex; /* Protects device mailbox and firmware */
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char firmware_version[0x10];
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unsigned long *enabled_cmds;
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struct range pmem_range;
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struct range ram_range;
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u64 total_bytes;
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u64 volatile_only_bytes;
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u64 persistent_only_bytes;
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u64 partition_align_bytes;
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u64 active_volatile_bytes;
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u64 active_persistent_bytes;
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u64 next_volatile_bytes;
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u64 next_persistent_bytes;
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int (*mbox_send)(struct cxl_mem *cxlm, struct cxl_mbox_cmd *cmd);
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};
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#endif /* __CXL_MEM_H__ */
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