linux/drivers/gpu/drm/amd/pm/inc
Xiaojian Du 08da4fcd6d drm/amd/pm: modify the fine grain tuning function for Renoir
This patch is to improve the fine grain tuning function for Renoir.
The fine grain tuning function uses the sysfs node -- pp_od_clk_voltage
to config gfxclk. Meanwhile, another sysfs
node -- power_dpm_force_perfomance_level also affects the gfx clk.
It will cause confusion when these two sysfs nodes works
together.
And the flag "od_enabled" is used to control the overdrive function for
dGPU, like navi10, navi14 and navi21.
APU like Renior or Vangogh uses this "od_enabled" to configure
the frequency range of gfx clock, but the max value of frequency
range will not be higher than the safe limit, it is not "overdrive".
So this patch adds two new flags -- "fine_grain_enabled" and
"fine_grain_started" to avoid this confusion, the flag will
make these two sysfs nodes work separately.
The flag "fine_grain_enabled" is set as "enabled" by default,
so the fine grain tuning function will be enabled by default.
But the flag "fine_grain_started" is set as "false" by default,
so the fine grain function will not take effect until it is set as
"true".
Only when power_dpm_force_perfomance_level is changed to
"manual" mode, the flag "fine_grain_started" will be set as "true",
and the fine grain tuning function will be started.
In other profile modes, including "auto", "high", "low", "profile_peak",
"profile_standard", "profile_min_sclk", "profile_min_mclk",
the flag "fine_grain_started" will be set as "false", and the od range of
fine grain tuning function will be restored default value.

Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-08 15:18:45 -05:00
..
vega12
amd_powerplay.h
amdgpu_dpm.h drm/amd/powerplay: add one sysfs file to support the feature to modify gfx clock on Raven/Raven2/Picasso APU. 2020-09-29 16:12:16 -04:00
amdgpu_pm.h
amdgpu_smu.h drm/amd/pm: modify the fine grain tuning function for Renoir 2021-01-08 15:18:45 -05:00
arcturus_ppsmc.h
cz_ppsmc.h
fiji_ppsmc.h
hardwaremanager.h
hwmgr.h drm/amd/pm/powerplay/hwmgr/hwmgr: Move 'vega20_hwmgr_init()'s prototype to shared header 2020-12-01 16:04:45 -05:00
polaris10_pwrvirus.h
power_state.h
pp_debug.h
pp_endian.h
pp_thermal.h drm/amd/pm/inc/pp_thermal: Mark 'SMU7Thermal{WithDelay}Policy' as __maybe_unused 2020-12-01 16:04:44 -05:00
ppinterrupt.h
rv_ppsmc.h drm/amdgpu: add amdgpu_gfx_state_change_set() set gfx power change entry (v2) 2020-11-13 17:29:45 -05:00
smu7_common.h
smu7_discrete.h
smu7_fusion.h
smu7_ppsmc.h drm/amd/pm: correct Polaris DIDT configurations 2020-10-27 11:59:16 -04:00
smu7.h
smu8_fusion.h
smu8.h
smu9_driver_if.h
smu9.h
smu10_driver_if.h drm/amd/pm: add Raven2 watermark WmType setting 2020-09-17 17:48:18 -04:00
smu10.h drm/amd/pm: update smu10.h WORKLOAD_PPLIB setting for raven 2020-12-08 23:06:15 -05:00
smu11_driver_if_arcturus.h
smu11_driver_if_navi10.h
smu11_driver_if_sienna_cichlid.h drm/amd/pm: update driver if file for sienna cichlid 2020-11-16 12:18:10 -05:00
smu11_driver_if_vangogh.h drm/amd/pm: enable the "fetch" function of pp_dpm_vclk/dclk for vangogh 2021-01-05 11:30:06 -05:00
smu11_driver_if.h
smu12_driver_if.h
smu71_discrete.h
smu71.h
smu72_discrete.h
smu72.h
smu73_discrete.h
smu73.h
smu74_discrete.h drm/amd/pm: correct VR shared rail info 2020-10-27 11:58:57 -04:00
smu74.h
smu75_discrete.h
smu75.h
smu_11_0_cdr_table.h drm/amd/pm: implement a new umc cdr workaround 2020-09-17 17:46:40 -04:00
smu_types.h drm/amd/pm: support overdrive vddgfx offset setting(V2) 2020-12-23 15:07:03 -05:00
smu_ucode_xfer_cz.h
smu_ucode_xfer_vi.h
smu_v11_0_7_ppsmc.h drm/amd/pm: new SMC message for 2nd usb2.0 port workaround 2020-12-10 16:41:49 -05:00
smu_v11_0_7_pptable.h
smu_v11_0_ppsmc.h drm/amd/pm: apply the CDR workarounds only with some specific UMC firmwares(V2) 2020-09-17 17:46:47 -04:00
smu_v11_0_pptable.h
smu_v11_0.h drm/amd/pm: bump Sienna Cichlid smu_driver_if version to match latest pmfw 2020-12-23 15:03:01 -05:00
smu_v11_5_pmfw.h drm/amd/pm: update the swSMU headers for vangogh 2020-11-13 00:12:51 -05:00
smu_v11_5_ppsmc.h drm/amd/pm: update the smu v11.5 smc header for vangogh 2020-12-10 16:41:50 -05:00
smu_v12_0_ppsmc.h
smu_v12_0.h
smumgr.h drm/amd/pm: perform SMC reset on suspend/hibernation 2020-10-30 01:00:43 -04:00
tonga_ppsmc.h
vega10_ppsmc.h
vega12_ppsmc.h
vega20_ppsmc.h