Wherever possible, replace constructs that match either generic_handle_irq(irq_find_mapping()) or generic_handle_irq(irq_linear_revmap()) to a single call to generic_handle_domain_irq(). Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Signed-off-by: Marc Zyngier <maz@kernel.org>
		
			
				
	
	
		
			111 lines
		
	
	
		
			2.7 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			111 lines
		
	
	
		
			2.7 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
// SPDX-License-Identifier: GPL-2.0-only
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/*
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 *  Aspeed 24XX/25XX I2C Interrupt Controller.
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 *
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 *  Copyright (C) 2012-2017 ASPEED Technology Inc.
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 *  Copyright 2017 IBM Corporation
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 *  Copyright 2017 Google, Inc.
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 */
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#include <linux/irq.h>
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#include <linux/irqchip.h>
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#include <linux/irqchip/chained_irq.h>
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#include <linux/irqdomain.h>
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#include <linux/of_address.h>
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#include <linux/of_irq.h>
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#include <linux/io.h>
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#define ASPEED_I2C_IC_NUM_BUS 14
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struct aspeed_i2c_ic {
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	void __iomem		*base;
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	int			parent_irq;
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	struct irq_domain	*irq_domain;
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};
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/*
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 * The aspeed chip provides a single hardware interrupt for all of the I2C
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 * busses, so we use a dummy interrupt chip to translate this single interrupt
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 * into multiple interrupts, each associated with a single I2C bus.
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 */
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static void aspeed_i2c_ic_irq_handler(struct irq_desc *desc)
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{
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	struct aspeed_i2c_ic *i2c_ic = irq_desc_get_handler_data(desc);
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	struct irq_chip *chip = irq_desc_get_chip(desc);
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	unsigned long bit, status;
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	chained_irq_enter(chip, desc);
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	status = readl(i2c_ic->base);
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	for_each_set_bit(bit, &status, ASPEED_I2C_IC_NUM_BUS)
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		generic_handle_domain_irq(i2c_ic->irq_domain, bit);
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	chained_irq_exit(chip, desc);
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}
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/*
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 * Set simple handler and mark IRQ as valid. Nothing interesting to do here
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 * since we are using a dummy interrupt chip.
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 */
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static int aspeed_i2c_ic_map_irq_domain(struct irq_domain *domain,
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					unsigned int irq, irq_hw_number_t hwirq)
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{
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	irq_set_chip_and_handler(irq, &dummy_irq_chip, handle_simple_irq);
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	irq_set_chip_data(irq, domain->host_data);
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	return 0;
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}
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static const struct irq_domain_ops aspeed_i2c_ic_irq_domain_ops = {
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	.map = aspeed_i2c_ic_map_irq_domain,
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};
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static int __init aspeed_i2c_ic_of_init(struct device_node *node,
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					struct device_node *parent)
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{
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	struct aspeed_i2c_ic *i2c_ic;
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	int ret = 0;
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	i2c_ic = kzalloc(sizeof(*i2c_ic), GFP_KERNEL);
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	if (!i2c_ic)
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		return -ENOMEM;
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	i2c_ic->base = of_iomap(node, 0);
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	if (!i2c_ic->base) {
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		ret = -ENOMEM;
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		goto err_free_ic;
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	}
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	i2c_ic->parent_irq = irq_of_parse_and_map(node, 0);
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	if (i2c_ic->parent_irq < 0) {
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		ret = i2c_ic->parent_irq;
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		goto err_iounmap;
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	}
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	i2c_ic->irq_domain = irq_domain_add_linear(node, ASPEED_I2C_IC_NUM_BUS,
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						   &aspeed_i2c_ic_irq_domain_ops,
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						   NULL);
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	if (!i2c_ic->irq_domain) {
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		ret = -ENOMEM;
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		goto err_iounmap;
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	}
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	i2c_ic->irq_domain->name = "aspeed-i2c-domain";
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	irq_set_chained_handler_and_data(i2c_ic->parent_irq,
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					 aspeed_i2c_ic_irq_handler, i2c_ic);
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	pr_info("i2c controller registered, irq %d\n", i2c_ic->parent_irq);
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	return 0;
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err_iounmap:
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	iounmap(i2c_ic->base);
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err_free_ic:
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	kfree(i2c_ic);
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	return ret;
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}
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IRQCHIP_DECLARE(ast2400_i2c_ic, "aspeed,ast2400-i2c-ic", aspeed_i2c_ic_of_init);
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IRQCHIP_DECLARE(ast2500_i2c_ic, "aspeed,ast2500-i2c-ic", aspeed_i2c_ic_of_init);
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