linux/drivers/gpu/drm/amd/display/dc/dcn10
Jun Lei 33d7598d70 drm/amd/display: fix up reference clock abstractions
[why]
"reference clock" is a very overloaded variable in DC and causes confusion
as there are multiple sources of reference clock, which may be different values
incorrect input values to DML will cause DCHUB to be programmed improperly
and lead to hard to debug underflow issues

[how]
instead of using ref clock everywhere, specify WHICH ref clock:
- xtalin
- dccg refclk
- dchub refclk

these are all distinct values which may not be equal

Signed-off-by: Jun Lei <Jun.Lei@amd.com>
Reviewed-by: Yongqiang Sun <yongqiang.sun@amd.com>
Acked-by: David Francis <David.Francis@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-03-19 15:36:49 -05:00
..
dcn10_clk_mgr.c drm/amd/display: Add pp_smu null pointer check 2019-03-19 15:04:03 -05:00
dcn10_clk_mgr.h
dcn10_cm_common.c drm/amd/display: Add tracing to dc 2018-12-05 17:49:49 -05:00
dcn10_cm_common.h
dcn10_dpp_cm.c drm/amd/display: Move enum gamut_remap_select to hw_shared.h 2019-03-05 15:09:32 -05:00
dcn10_dpp_dscl.c drm/amd/display: Fix Divide by 0 in memory calculations 2019-03-19 15:04:04 -05:00
dcn10_dpp.c drm/amd/display: Move enum gamut_remap_select to hw_shared.h 2019-03-05 15:09:32 -05:00
dcn10_dpp.h
dcn10_hubbub.c drm/amd/display: Combine field toggle macro and sequence write macro. 2019-03-19 15:36:49 -05:00
dcn10_hubbub.h Revert "drm/amd/display: dcn add check surface in_use" 2019-03-19 15:04:03 -05:00
dcn10_hubp.c drm/amd/display: PIP overlay corruption 2019-02-06 13:30:28 -05:00
dcn10_hubp.h drm/amd/display: Add DCN_VM aperture registers 2019-03-05 15:09:32 -05:00
dcn10_hw_sequencer_debug.c drm/amd/display: fix up reference clock abstractions 2019-03-19 15:36:49 -05:00
dcn10_hw_sequencer.c drm/amd/display: fix up reference clock abstractions 2019-03-19 15:36:49 -05:00
dcn10_hw_sequencer.h drm/amd/display: Refactor for setup periodic interrupt. 2019-02-19 15:58:27 -05:00
dcn10_ipp.c
dcn10_ipp.h
dcn10_link_encoder.c drm/amd/display: Refactor reg_set and reg_update. 2019-03-19 15:36:49 -05:00
dcn10_link_encoder.h drm/amd/display: interface to check if timing can be seamless 2019-02-06 13:30:44 -05:00
dcn10_mpc.c
dcn10_mpc.h
dcn10_opp.c
dcn10_opp.h
dcn10_optc.c drm/amd/display: Refactor for setup periodic interrupt. 2019-02-19 15:58:27 -05:00
dcn10_optc.h drm/amd/display: Refactor for setup periodic interrupt. 2019-02-19 15:58:27 -05:00
dcn10_resource.c drm/amd/display: Free DCN version of stream encoder 2019-03-19 15:36:49 -05:00
dcn10_resource.h
dcn10_stream_encoder.c drm/amd/display: Increase DP blank timeout from 30 ms to 50 ms 2019-03-19 15:36:49 -05:00
dcn10_stream_encoder.h drm/amd/display: Connect dig_fe to otg directly instead of calling bios 2019-01-25 16:15:37 -05:00
Makefile