Used wrong pp interface, the original interface is exposed by dpm on SI and paritial CI. Pointed out by Francis David <david.francis@amd.com> v2: dal only need to set min_dcefclk and min_fclk to smu. so use display_clock_voltage_request interface, instand of update all display configuration. Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> |
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.. | ||
amdgpu_dm_color.c | ||
amdgpu_dm_crc.c | ||
amdgpu_dm_debugfs.c | ||
amdgpu_dm_debugfs.h | ||
amdgpu_dm_helpers.c | ||
amdgpu_dm_irq.c | ||
amdgpu_dm_irq.h | ||
amdgpu_dm_mst_types.c | ||
amdgpu_dm_mst_types.h | ||
amdgpu_dm_pp_smu.c | ||
amdgpu_dm_services.c | ||
amdgpu_dm.c | ||
amdgpu_dm.h | ||
Makefile |