forked from Minki/linux
b4d4b0b7de
on all platforms back to HSW. As well many other fix and improvements, Including: - Use GEM suspend when aborting initialization (Chris) - Change i915_gem_fault to return vm_fault_t (Chris) - Expand VMA to Non gem object entities (Chris) - Improve logs for load failure, but quite logging on fault injection to avoid noise on CI (Chris) - Other page directory handling fixes and improvements for gen6 (Chris) - Other gtt clean-up removing redundancies and unused checks (Chris) - Reorder aliasing ppgtt fini (Chris) - Refactor of unsetting obg->mm.pages (Chris) - Apply batch location restrictions before pinning (Chris) - Ringbuffer fixes for context restore (Chris) - Execlist fixes on freeing error pointer on allocation error (Chris) - Make closing request flush mandatory (Chris) - Move GEM sanitize from resume_early to resume (Chris) - Improve debug dumps (Chris) - Silent compiler for selftest (Chris) - Other execlists changes to improve hangcheck and reset. - Many gtt page directory fixes and improvements (Chris) - Reorg context workarounds (Chris) - Avoid ERR_PTR dereference on selftest (Chris) Other GEM related work: - Stop trying to reset GPU if reset failed (Mika) - Add HW workaround for KBL to fix GPU reset (Mika) - Fix context ban and hang accounting for client (Mika) - Fixes on OA perf (Michel, Jani) - Refactor on GuC log mechanisms (Piotr) - Enable provoking vertex fix on Gen9 system (Kenneth) More ICL patches for Display enabling: - ICL - 10-bit support for HDMI (RK) - ICL - Start adding TBT PLL (Paulo) - ICL - DDI HDMK level selection (Manasi) - ICL - GMBUS GPIO pin mapping fix (Mahesh) - ICL - Adding DP_AUX_E support (James) - ICL - Display interrupts handling (DK) Other display fixes and improvements: - Fix sprite destination color keying on SKL+ (Ville) - Fixes and improvements on PCH detection, specially for non PCH systems (Jani) - Document PCH_NOP (Lucas) - Allow DBLSCAN user modes with eDP/LVDS/DSI (Ville) - Opregion and ACPI cleanup and organization (Jani) - Kill delays when activation psr (Rodrigo) - ...and a consequent fix of the psr activation flow (DK) - Fix HDMI infoframe setting (Imre) - Fix Display interrupts and modes on old gens (Ville) - Start switching to kernel unsigned int types (Jani) - Introduction to Amber Lake and Whiskey Lake platforms (Jose) - Audio clock fixes for HBR3 (RK) - Standardize i915_reg.h definitions according to our doc and checkpatch (Paulo) - Remove unused timespec_to_jiffies_timeout function (Arnd) - Increase the scope of PSR wake fix for other VBTs out there (Vathsala) - Improve debug msgs with prop name/id (Ville) - Other clean up on unecessary cursor size defines (Ville) - Enforce max hdisplay/hblank_start limits on HSW/BDW (Ville) - Make ELD pointers constant (Jani) - Fix for PSR VBT parse (Colin) - Add warn about unsupported CDCLK rates (Imre) -----BEGIN PGP SIGNATURE----- iQEcBAABAgAGBQJbKsMqAAoJEPpiX2QO6xPKI64H/0dHkMxw7/D83eODTJteDFBN h3tdBnLFlPfeG3ZWDeSs04/dM4e9YacMN7v53j1ia4eW/F1ms0TLcegcuPqYafTW H8fhwGB2B5gmr5hLfh5joQkxvaucQMFdg95fWRqir93VrKvVJAJEYNcaiGniejDf qqiZue6DgAzli0zjAprfbQsnJ17TyRtnxm8lLIcFcHPoayHBzAUBZQEP6cA5qe/Y /2ahGfkYOVVWY08DHaioDBOLUEUbxCC1AvMlv9VbtKmyPoQjTIW/1iTq0RRxDoGb BwfDvigSiFAmpYEfVENB0qUd9e/0WhMboSnMrfzEcF2yUn4xoJx5nbmkRFkr1jI= =mfO6 -----END PGP SIGNATURE----- Merge tag 'drm-intel-next-2018-06-20' of git://anongit.freedesktop.org/drm/drm-intel into drm-next Chris is doing many reworks that allow us to get full-ppgtt supported on all platforms back to HSW. As well many other fix and improvements, Including: - Use GEM suspend when aborting initialization (Chris) - Change i915_gem_fault to return vm_fault_t (Chris) - Expand VMA to Non gem object entities (Chris) - Improve logs for load failure, but quite logging on fault injection to avoid noise on CI (Chris) - Other page directory handling fixes and improvements for gen6 (Chris) - Other gtt clean-up removing redundancies and unused checks (Chris) - Reorder aliasing ppgtt fini (Chris) - Refactor of unsetting obg->mm.pages (Chris) - Apply batch location restrictions before pinning (Chris) - Ringbuffer fixes for context restore (Chris) - Execlist fixes on freeing error pointer on allocation error (Chris) - Make closing request flush mandatory (Chris) - Move GEM sanitize from resume_early to resume (Chris) - Improve debug dumps (Chris) - Silent compiler for selftest (Chris) - Other execlists changes to improve hangcheck and reset. - Many gtt page directory fixes and improvements (Chris) - Reorg context workarounds (Chris) - Avoid ERR_PTR dereference on selftest (Chris) Other GEM related work: - Stop trying to reset GPU if reset failed (Mika) - Add HW workaround for KBL to fix GPU reset (Mika) - Fix context ban and hang accounting for client (Mika) - Fixes on OA perf (Michel, Jani) - Refactor on GuC log mechanisms (Piotr) - Enable provoking vertex fix on Gen9 system (Kenneth) More ICL patches for Display enabling: - ICL - 10-bit support for HDMI (RK) - ICL - Start adding TBT PLL (Paulo) - ICL - DDI HDMK level selection (Manasi) - ICL - GMBUS GPIO pin mapping fix (Mahesh) - ICL - Adding DP_AUX_E support (James) - ICL - Display interrupts handling (DK) Other display fixes and improvements: - Fix sprite destination color keying on SKL+ (Ville) - Fixes and improvements on PCH detection, specially for non PCH systems (Jani) - Document PCH_NOP (Lucas) - Allow DBLSCAN user modes with eDP/LVDS/DSI (Ville) - Opregion and ACPI cleanup and organization (Jani) - Kill delays when activation psr (Rodrigo) - ...and a consequent fix of the psr activation flow (DK) - Fix HDMI infoframe setting (Imre) - Fix Display interrupts and modes on old gens (Ville) - Start switching to kernel unsigned int types (Jani) - Introduction to Amber Lake and Whiskey Lake platforms (Jose) - Audio clock fixes for HBR3 (RK) - Standardize i915_reg.h definitions according to our doc and checkpatch (Paulo) - Remove unused timespec_to_jiffies_timeout function (Arnd) - Increase the scope of PSR wake fix for other VBTs out there (Vathsala) - Improve debug msgs with prop name/id (Ville) - Other clean up on unecessary cursor size defines (Ville) - Enforce max hdisplay/hblank_start limits on HSW/BDW (Ville) - Make ELD pointers constant (Jani) - Fix for PSR VBT parse (Colin) - Add warn about unsupported CDCLK rates (Imre) Signed-off-by: Dave Airlie <airlied@redhat.com> # gpg: Signature made Thu 21 Jun 2018 07:12:10 AM AEST # gpg: using RSA key FA625F640EEB13CA # gpg: Good signature from "Rodrigo Vivi <rodrigo.vivi@intel.com>" # gpg: aka "Rodrigo Vivi <rodrigo.vivi@gmail.com>" # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 6D20 7068 EEDD 6509 1C2C E2A3 FA62 5F64 0EEB 13CA Link: https://patchwork.freedesktop.org/patch/msgid/20180625165622.GA21761@intel.com
295 lines
9.0 KiB
C
295 lines
9.0 KiB
C
/*
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* Copyright © 2014 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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/**
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* DOC: atomic plane helpers
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*
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* The functions here are used by the atomic plane helper functions to
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* implement legacy plane updates (i.e., drm_plane->update_plane() and
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* drm_plane->disable_plane()). This allows plane updates to use the
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* atomic state infrastructure and perform plane updates as separate
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* prepare/check/commit/cleanup steps.
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*/
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#include <drm/drmP.h>
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#include <drm/drm_atomic_helper.h>
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#include <drm/drm_plane_helper.h>
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#include "intel_drv.h"
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/**
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* intel_create_plane_state - create plane state object
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* @plane: drm plane
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*
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* Allocates a fresh plane state for the given plane and sets some of
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* the state values to sensible initial values.
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*
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* Returns: A newly allocated plane state, or NULL on failure
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*/
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struct intel_plane_state *
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intel_create_plane_state(struct drm_plane *plane)
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{
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struct intel_plane_state *state;
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state = kzalloc(sizeof(*state), GFP_KERNEL);
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if (!state)
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return NULL;
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state->base.plane = plane;
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state->base.rotation = DRM_MODE_ROTATE_0;
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return state;
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}
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/**
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* intel_plane_duplicate_state - duplicate plane state
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* @plane: drm plane
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*
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* Allocates and returns a copy of the plane state (both common and
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* Intel-specific) for the specified plane.
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*
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* Returns: The newly allocated plane state, or NULL on failure.
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*/
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struct drm_plane_state *
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intel_plane_duplicate_state(struct drm_plane *plane)
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{
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struct drm_plane_state *state;
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struct intel_plane_state *intel_state;
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intel_state = kmemdup(plane->state, sizeof(*intel_state), GFP_KERNEL);
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if (!intel_state)
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return NULL;
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state = &intel_state->base;
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__drm_atomic_helper_plane_duplicate_state(plane, state);
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intel_state->vma = NULL;
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intel_state->flags = 0;
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return state;
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}
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/**
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* intel_plane_destroy_state - destroy plane state
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* @plane: drm plane
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* @state: state object to destroy
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*
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* Destroys the plane state (both common and Intel-specific) for the
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* specified plane.
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*/
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void
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intel_plane_destroy_state(struct drm_plane *plane,
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struct drm_plane_state *state)
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{
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WARN_ON(to_intel_plane_state(state)->vma);
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drm_atomic_helper_plane_destroy_state(plane, state);
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}
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int intel_plane_atomic_check_with_state(const struct intel_crtc_state *old_crtc_state,
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struct intel_crtc_state *crtc_state,
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const struct intel_plane_state *old_plane_state,
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struct intel_plane_state *intel_state)
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{
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struct drm_plane *plane = intel_state->base.plane;
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struct drm_i915_private *dev_priv = to_i915(plane->dev);
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struct drm_plane_state *state = &intel_state->base;
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struct intel_plane *intel_plane = to_intel_plane(plane);
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const struct drm_display_mode *adjusted_mode =
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&crtc_state->base.adjusted_mode;
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int ret;
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if (!intel_state->base.crtc && !old_plane_state->base.crtc)
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return 0;
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if (state->fb && drm_rotation_90_or_270(state->rotation)) {
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struct drm_format_name_buf format_name;
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if (state->fb->modifier != I915_FORMAT_MOD_Y_TILED &&
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state->fb->modifier != I915_FORMAT_MOD_Yf_TILED) {
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DRM_DEBUG_KMS("Y/Yf tiling required for 90/270!\n");
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return -EINVAL;
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}
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/*
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* 90/270 is not allowed with RGB64 16:16:16:16,
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* RGB 16-bit 5:6:5, and Indexed 8-bit.
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* TBD: Add RGB64 case once its added in supported format list.
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*/
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switch (state->fb->format->format) {
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case DRM_FORMAT_C8:
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case DRM_FORMAT_RGB565:
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DRM_DEBUG_KMS("Unsupported pixel format %s for 90/270!\n",
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drm_get_format_name(state->fb->format->format,
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&format_name));
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return -EINVAL;
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default:
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break;
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}
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}
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/* CHV ignores the mirror bit when the rotate bit is set :( */
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if (IS_CHERRYVIEW(dev_priv) &&
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state->rotation & DRM_MODE_ROTATE_180 &&
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state->rotation & DRM_MODE_REFLECT_X) {
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DRM_DEBUG_KMS("Cannot rotate and reflect at the same time\n");
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return -EINVAL;
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}
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intel_state->base.visible = false;
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ret = intel_plane->check_plane(intel_plane, crtc_state, intel_state);
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if (ret)
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return ret;
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/*
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* Y-tiling is not supported in IF-ID Interlace mode in
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* GEN9 and above.
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*/
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if (state->fb && INTEL_GEN(dev_priv) >= 9 && crtc_state->base.enable &&
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adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE) {
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if (state->fb->modifier == I915_FORMAT_MOD_Y_TILED ||
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state->fb->modifier == I915_FORMAT_MOD_Yf_TILED) {
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DRM_DEBUG_KMS("Y/Yf tiling not supported in IF-ID mode\n");
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return -EINVAL;
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}
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}
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/* FIXME pre-g4x don't work like this */
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if (state->visible)
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crtc_state->active_planes |= BIT(intel_plane->id);
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else
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crtc_state->active_planes &= ~BIT(intel_plane->id);
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if (state->visible && state->fb->format->format == DRM_FORMAT_NV12)
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crtc_state->nv12_planes |= BIT(intel_plane->id);
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else
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crtc_state->nv12_planes &= ~BIT(intel_plane->id);
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return intel_plane_atomic_calc_changes(old_crtc_state,
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&crtc_state->base,
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old_plane_state,
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state);
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}
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static int intel_plane_atomic_check(struct drm_plane *plane,
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struct drm_plane_state *new_plane_state)
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{
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struct drm_atomic_state *state = new_plane_state->state;
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const struct drm_plane_state *old_plane_state =
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drm_atomic_get_old_plane_state(state, plane);
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struct drm_crtc *crtc = new_plane_state->crtc ?: old_plane_state->crtc;
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const struct drm_crtc_state *old_crtc_state;
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struct drm_crtc_state *new_crtc_state;
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if (!crtc)
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return 0;
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old_crtc_state = drm_atomic_get_old_crtc_state(state, crtc);
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new_crtc_state = drm_atomic_get_new_crtc_state(state, crtc);
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return intel_plane_atomic_check_with_state(to_intel_crtc_state(old_crtc_state),
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to_intel_crtc_state(new_crtc_state),
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to_intel_plane_state(old_plane_state),
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to_intel_plane_state(new_plane_state));
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}
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static void intel_plane_atomic_update(struct drm_plane *plane,
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struct drm_plane_state *old_state)
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{
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struct intel_atomic_state *state = to_intel_atomic_state(old_state->state);
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struct intel_plane *intel_plane = to_intel_plane(plane);
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const struct intel_plane_state *new_plane_state =
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intel_atomic_get_new_plane_state(state, intel_plane);
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struct drm_crtc *crtc = new_plane_state->base.crtc ?: old_state->crtc;
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if (new_plane_state->base.visible) {
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const struct intel_crtc_state *new_crtc_state =
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intel_atomic_get_new_crtc_state(state, to_intel_crtc(crtc));
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trace_intel_update_plane(plane,
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to_intel_crtc(crtc));
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intel_plane->update_plane(intel_plane,
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new_crtc_state, new_plane_state);
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} else {
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trace_intel_disable_plane(plane,
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to_intel_crtc(crtc));
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intel_plane->disable_plane(intel_plane, to_intel_crtc(crtc));
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}
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}
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const struct drm_plane_helper_funcs intel_plane_helper_funcs = {
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.prepare_fb = intel_prepare_plane_fb,
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.cleanup_fb = intel_cleanup_plane_fb,
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.atomic_check = intel_plane_atomic_check,
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.atomic_update = intel_plane_atomic_update,
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};
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/**
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* intel_plane_atomic_get_property - fetch plane property value
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* @plane: plane to fetch property for
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* @state: state containing the property value
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* @property: property to look up
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* @val: pointer to write property value into
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*
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* The DRM core does not store shadow copies of properties for
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* atomic-capable drivers. This entrypoint is used to fetch
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* the current value of a driver-specific plane property.
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*/
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int
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intel_plane_atomic_get_property(struct drm_plane *plane,
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const struct drm_plane_state *state,
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struct drm_property *property,
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uint64_t *val)
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{
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DRM_DEBUG_KMS("Unknown property [PROP:%d:%s]\n",
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property->base.id, property->name);
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return -EINVAL;
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}
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/**
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* intel_plane_atomic_set_property - set plane property value
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* @plane: plane to set property for
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* @state: state to update property value in
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* @property: property to set
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* @val: value to set property to
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*
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* Writes the specified property value for a plane into the provided atomic
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* state object.
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*
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* Returns 0 on success, -EINVAL on unrecognized properties
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*/
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int
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intel_plane_atomic_set_property(struct drm_plane *plane,
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struct drm_plane_state *state,
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struct drm_property *property,
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uint64_t val)
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{
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DRM_DEBUG_KMS("Unknown property [PROP:%d:%s]\n",
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property->base.id, property->name);
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return -EINVAL;
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}
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