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linux/drivers/gpu/drm/amd/display/dc/dcn10
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Dmytro Laktyushkin 99326ee362 drm/amd/display: program display clock on cache match 
[Why]
We seem to have an issue where high enough display clock
will not get set properly during S3 resume if we only
call vbios once

[How]
Expand condition of display clock programming to happen
even when cached display clock matches requested display
clock

Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-06 15:57:12 -05:00
..
dcn10_cm_common.c drm/amd/display: get rid of 32.32 unsigned fixed point 2018-05-18 16:08:21 -05:00
dcn10_cm_common.h drm/amd/display: Handle HDR use cases. 2018-03-05 15:34:58 -05:00
dcn10_dpp_cm.c drm/amd/display: get rid of 32.32 unsigned fixed point 2018-05-18 16:08:21 -05:00
dcn10_dpp_dscl.c drm/amd/display: add HDR visual confirm 2018-07-16 16:11:49 -05:00
dcn10_dpp.c drm/amd/display: Refactor SDR cursor boosting in HDR mode 2018-07-16 16:11:49 -05:00
dcn10_dpp.h drm/amd/display: Refactor SDR cursor boosting in HDR mode 2018-07-16 16:11:49 -05:00
dcn10_hubbub.c drm/amd/display: add valid regoffset and NULL pointer check 2018-07-05 16:38:44 -05:00
dcn10_hubbub.h drm/amd/display: separate out wm change request dcn workaround 2018-07-05 16:38:42 -05:00
dcn10_hubp.c drm/amd/display: DPP CM ICSC AYCRCB8888 format support 2018-07-24 15:15:41 -05:00
dcn10_hubp.h drm/amd/display: Refactor SDR cursor boosting in HDR mode 2018-07-16 16:11:49 -05:00
dcn10_hw_sequencer.c drm/amd/display: program display clock on cache match 2018-08-06 15:57:12 -05:00
dcn10_hw_sequencer.h drm/amd/display: Expose bunch of functions from dcn10_hw_sequencer 2018-07-13 14:50:40 -05:00
dcn10_ipp.c drm/amd/display: moving cursor functions from ipp to mem_input 2017-10-21 16:44:03 -04:00
dcn10_ipp.h drm/amd/display: Move dpp reg access from hwss to dpp module. 2018-02-19 14:17:33 -05:00
dcn10_link_encoder.c drm/amd/display: add DalEnableHDMI20 key support 2018-07-13 14:51:11 -05:00
dcn10_link_encoder.h drm/amd/display: expose dcn10_aux_initialize in header 2018-07-13 14:50:10 -05:00
dcn10_mpc.c drm/amd/display: Make function pointer structs const 2018-07-10 14:17:23 -05:00
dcn10_mpc.h drm/amd/display: add mpc to dtn log 2018-04-11 13:07:38 -05:00
dcn10_opp.c drm/amd/display: Make function pointer structs const 2018-07-10 14:17:23 -05:00
dcn10_opp.h drm/amd/display: Move opp reg access from hwss to opp module. 2018-02-19 14:17:34 -05:00
dcn10_optc.c drm/amd/display: Add CRC support for DCN 2018-07-13 14:51:39 -05:00
dcn10_optc.h drm/amd/display: Expose couple OPTC functions through header 2018-07-13 14:51:47 -05:00
dcn10_resource.c drm/amd/display: Fix DP HBR2 Eye Diagram Pattern on Carrizo 2018-08-06 14:35:25 -05:00
dcn10_resource.h drm/amd/display: Flattening core_dc to dc 2017-09-26 18:16:40 -04:00
dcn10_stream_encoder.c drm/amd/display: Allow DP register double buffer 2018-06-15 12:24:50 -05:00
dcn10_stream_encoder.h drm/amd/display: Make DCN stream encoder shareable 2018-04-11 13:08:09 -05:00
Makefile drm/amd/display: DCN1 link encoder 2018-05-18 16:08:29 -05:00