forked from Minki/linux
f9eb63b98c
Despite us reloading the module around every selftest, the lockclasses persist and the chains used in selftesting may then dictate how we are allowed to nest locks during runtime testing. As such we have to be just as careful, and in particular it turns out we are not allowed to nest dev->object_name_lock (drm_gem_handle_create) inside dev->struct_mutex. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103830 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Matthew Auld <matthew.auld@intel.com> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20171121110652.1107-1-chris@chris-wilson.co.uk Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
475 lines
11 KiB
C
475 lines
11 KiB
C
/*
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* Copyright © 2017 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*
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*/
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#include "../i915_selftest.h"
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#include "mock_drm.h"
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#include "huge_gem_object.h"
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#define DW_PER_PAGE (PAGE_SIZE / sizeof(u32))
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static struct i915_vma *
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gpu_fill_dw(struct i915_vma *vma, u64 offset, unsigned long count, u32 value)
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{
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struct drm_i915_gem_object *obj;
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const int gen = INTEL_GEN(vma->vm->i915);
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unsigned long n, size;
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u32 *cmd;
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int err;
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size = (4 * count + 1) * sizeof(u32);
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size = round_up(size, PAGE_SIZE);
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obj = i915_gem_object_create_internal(vma->vm->i915, size);
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if (IS_ERR(obj))
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return ERR_CAST(obj);
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cmd = i915_gem_object_pin_map(obj, I915_MAP_WB);
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if (IS_ERR(cmd)) {
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err = PTR_ERR(cmd);
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goto err;
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}
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GEM_BUG_ON(offset + (count - 1) * PAGE_SIZE > vma->node.size);
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offset += vma->node.start;
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for (n = 0; n < count; n++) {
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if (gen >= 8) {
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*cmd++ = MI_STORE_DWORD_IMM_GEN4;
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*cmd++ = lower_32_bits(offset);
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*cmd++ = upper_32_bits(offset);
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*cmd++ = value;
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} else if (gen >= 4) {
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*cmd++ = MI_STORE_DWORD_IMM_GEN4 |
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(gen < 6 ? 1 << 22 : 0);
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*cmd++ = 0;
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*cmd++ = offset;
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*cmd++ = value;
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} else {
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*cmd++ = MI_STORE_DWORD_IMM | 1 << 22;
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*cmd++ = offset;
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*cmd++ = value;
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}
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offset += PAGE_SIZE;
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}
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*cmd = MI_BATCH_BUFFER_END;
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i915_gem_object_unpin_map(obj);
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err = i915_gem_object_set_to_gtt_domain(obj, false);
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if (err)
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goto err;
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vma = i915_vma_instance(obj, vma->vm, NULL);
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if (IS_ERR(vma)) {
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err = PTR_ERR(vma);
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goto err;
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}
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err = i915_vma_pin(vma, 0, 0, PIN_USER);
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if (err)
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goto err;
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return vma;
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err:
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i915_gem_object_put(obj);
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return ERR_PTR(err);
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}
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static unsigned long real_page_count(struct drm_i915_gem_object *obj)
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{
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return huge_gem_object_phys_size(obj) >> PAGE_SHIFT;
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}
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static unsigned long fake_page_count(struct drm_i915_gem_object *obj)
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{
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return huge_gem_object_dma_size(obj) >> PAGE_SHIFT;
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}
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static int gpu_fill(struct drm_i915_gem_object *obj,
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struct i915_gem_context *ctx,
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struct intel_engine_cs *engine,
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unsigned int dw)
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{
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struct drm_i915_private *i915 = to_i915(obj->base.dev);
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struct i915_address_space *vm =
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ctx->ppgtt ? &ctx->ppgtt->base : &i915->ggtt.base;
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struct drm_i915_gem_request *rq;
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struct i915_vma *vma;
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struct i915_vma *batch;
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unsigned int flags;
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int err;
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GEM_BUG_ON(obj->base.size > vm->total);
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GEM_BUG_ON(!intel_engine_can_store_dword(engine));
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vma = i915_vma_instance(obj, vm, NULL);
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if (IS_ERR(vma))
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return PTR_ERR(vma);
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err = i915_gem_object_set_to_gtt_domain(obj, false);
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if (err)
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return err;
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err = i915_vma_pin(vma, 0, 0, PIN_HIGH | PIN_USER);
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if (err)
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return err;
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/* Within the GTT the huge objects maps every page onto
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* its 1024 real pages (using phys_pfn = dma_pfn % 1024).
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* We set the nth dword within the page using the nth
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* mapping via the GTT - this should exercise the GTT mapping
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* whilst checking that each context provides a unique view
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* into the object.
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*/
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batch = gpu_fill_dw(vma,
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(dw * real_page_count(obj)) << PAGE_SHIFT |
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(dw * sizeof(u32)),
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real_page_count(obj),
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dw);
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if (IS_ERR(batch)) {
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err = PTR_ERR(batch);
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goto err_vma;
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}
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rq = i915_gem_request_alloc(engine, ctx);
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if (IS_ERR(rq)) {
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err = PTR_ERR(rq);
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goto err_batch;
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}
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flags = 0;
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if (INTEL_GEN(vm->i915) <= 5)
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flags |= I915_DISPATCH_SECURE;
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err = engine->emit_bb_start(rq,
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batch->node.start, batch->node.size,
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flags);
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if (err)
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goto err_request;
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i915_vma_move_to_active(batch, rq, 0);
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i915_gem_object_set_active_reference(batch->obj);
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i915_vma_unpin(batch);
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i915_vma_close(batch);
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i915_vma_move_to_active(vma, rq, 0);
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i915_vma_unpin(vma);
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reservation_object_lock(obj->resv, NULL);
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reservation_object_add_excl_fence(obj->resv, &rq->fence);
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reservation_object_unlock(obj->resv);
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__i915_add_request(rq, true);
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return 0;
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err_request:
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__i915_add_request(rq, false);
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err_batch:
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i915_vma_unpin(batch);
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err_vma:
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i915_vma_unpin(vma);
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return err;
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}
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static int cpu_fill(struct drm_i915_gem_object *obj, u32 value)
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{
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const bool has_llc = HAS_LLC(to_i915(obj->base.dev));
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unsigned int n, m, need_flush;
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int err;
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err = i915_gem_obj_prepare_shmem_write(obj, &need_flush);
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if (err)
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return err;
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for (n = 0; n < real_page_count(obj); n++) {
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u32 *map;
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map = kmap_atomic(i915_gem_object_get_page(obj, n));
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for (m = 0; m < DW_PER_PAGE; m++)
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map[m] = value;
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if (!has_llc)
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drm_clflush_virt_range(map, PAGE_SIZE);
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kunmap_atomic(map);
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}
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i915_gem_obj_finish_shmem_access(obj);
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obj->base.read_domains = I915_GEM_DOMAIN_GTT | I915_GEM_DOMAIN_CPU;
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obj->base.write_domain = 0;
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return 0;
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}
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static int cpu_check(struct drm_i915_gem_object *obj, unsigned int max)
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{
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unsigned int n, m, needs_flush;
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int err;
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err = i915_gem_obj_prepare_shmem_read(obj, &needs_flush);
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if (err)
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return err;
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for (n = 0; n < real_page_count(obj); n++) {
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u32 *map;
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map = kmap_atomic(i915_gem_object_get_page(obj, n));
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if (needs_flush & CLFLUSH_BEFORE)
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drm_clflush_virt_range(map, PAGE_SIZE);
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for (m = 0; m < max; m++) {
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if (map[m] != m) {
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pr_err("Invalid value at page %d, offset %d: found %x expected %x\n",
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n, m, map[m], m);
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err = -EINVAL;
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goto out_unmap;
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}
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}
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for (; m < DW_PER_PAGE; m++) {
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if (map[m] != 0xdeadbeef) {
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pr_err("Invalid value at page %d, offset %d: found %x expected %x\n",
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n, m, map[m], 0xdeadbeef);
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err = -EINVAL;
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goto out_unmap;
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}
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}
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out_unmap:
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kunmap_atomic(map);
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if (err)
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break;
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}
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i915_gem_obj_finish_shmem_access(obj);
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return err;
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}
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static int file_add_object(struct drm_file *file,
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struct drm_i915_gem_object *obj)
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{
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int err;
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GEM_BUG_ON(obj->base.handle_count);
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/* tie the object to the drm_file for easy reaping */
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err = idr_alloc(&file->object_idr, &obj->base, 1, 0, GFP_KERNEL);
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if (err < 0)
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return err;
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i915_gem_object_get(obj);
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obj->base.handle_count++;
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return 0;
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}
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static struct drm_i915_gem_object *
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create_test_object(struct i915_gem_context *ctx,
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struct drm_file *file,
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struct list_head *objects)
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{
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struct drm_i915_gem_object *obj;
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struct i915_address_space *vm =
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ctx->ppgtt ? &ctx->ppgtt->base : &ctx->i915->ggtt.base;
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u64 size;
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int err;
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size = min(vm->total / 2, 1024ull * DW_PER_PAGE * PAGE_SIZE);
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size = round_down(size, DW_PER_PAGE * PAGE_SIZE);
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obj = huge_gem_object(ctx->i915, DW_PER_PAGE * PAGE_SIZE, size);
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if (IS_ERR(obj))
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return obj;
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err = file_add_object(file, obj);
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i915_gem_object_put(obj);
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if (err)
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return ERR_PTR(err);
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err = cpu_fill(obj, 0xdeadbeef);
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if (err) {
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pr_err("Failed to fill object with cpu, err=%d\n",
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err);
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return ERR_PTR(err);
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}
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list_add_tail(&obj->st_link, objects);
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return obj;
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}
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static unsigned long max_dwords(struct drm_i915_gem_object *obj)
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{
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unsigned long npages = fake_page_count(obj);
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GEM_BUG_ON(!IS_ALIGNED(npages, DW_PER_PAGE));
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return npages / DW_PER_PAGE;
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}
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static int igt_ctx_exec(void *arg)
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{
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struct drm_i915_private *i915 = arg;
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struct drm_i915_gem_object *obj = NULL;
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struct drm_file *file;
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IGT_TIMEOUT(end_time);
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LIST_HEAD(objects);
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unsigned long ncontexts, ndwords, dw;
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bool first_shared_gtt = true;
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int err = -ENODEV;
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/* Create a few different contexts (with different mm) and write
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* through each ctx/mm using the GPU making sure those writes end
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* up in the expected pages of our obj.
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*/
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file = mock_file(i915);
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if (IS_ERR(file))
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return PTR_ERR(file);
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mutex_lock(&i915->drm.struct_mutex);
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ncontexts = 0;
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ndwords = 0;
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dw = 0;
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while (!time_after(jiffies, end_time)) {
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struct intel_engine_cs *engine;
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struct i915_gem_context *ctx;
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unsigned int id;
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if (first_shared_gtt) {
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ctx = __create_hw_context(i915, file->driver_priv);
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first_shared_gtt = false;
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} else {
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ctx = i915_gem_create_context(i915, file->driver_priv);
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}
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if (IS_ERR(ctx)) {
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err = PTR_ERR(ctx);
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goto out_unlock;
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}
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for_each_engine(engine, i915, id) {
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if (!intel_engine_can_store_dword(engine))
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continue;
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if (!obj) {
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obj = create_test_object(ctx, file, &objects);
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if (IS_ERR(obj)) {
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err = PTR_ERR(obj);
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goto out_unlock;
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}
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}
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err = gpu_fill(obj, ctx, engine, dw);
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if (err) {
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pr_err("Failed to fill dword %lu [%lu/%lu] with gpu (%s) in ctx %u [full-ppgtt? %s], err=%d\n",
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ndwords, dw, max_dwords(obj),
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engine->name, ctx->hw_id,
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yesno(!!ctx->ppgtt), err);
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goto out_unlock;
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}
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if (++dw == max_dwords(obj)) {
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obj = NULL;
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dw = 0;
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}
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ndwords++;
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}
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ncontexts++;
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}
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pr_info("Submitted %lu contexts (across %u engines), filling %lu dwords\n",
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ncontexts, INTEL_INFO(i915)->num_rings, ndwords);
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dw = 0;
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list_for_each_entry(obj, &objects, st_link) {
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unsigned int rem =
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min_t(unsigned int, ndwords - dw, max_dwords(obj));
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err = cpu_check(obj, rem);
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if (err)
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break;
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dw += rem;
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}
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out_unlock:
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mutex_unlock(&i915->drm.struct_mutex);
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mock_file_free(i915, file);
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return err;
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}
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static int fake_aliasing_ppgtt_enable(struct drm_i915_private *i915)
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{
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struct drm_i915_gem_object *obj;
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int err;
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err = i915_gem_init_aliasing_ppgtt(i915);
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if (err)
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return err;
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list_for_each_entry(obj, &i915->mm.bound_list, mm.link) {
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struct i915_vma *vma;
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vma = i915_vma_instance(obj, &i915->ggtt.base, NULL);
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if (IS_ERR(vma))
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continue;
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vma->flags &= ~I915_VMA_LOCAL_BIND;
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}
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return 0;
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}
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static void fake_aliasing_ppgtt_disable(struct drm_i915_private *i915)
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{
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i915_gem_fini_aliasing_ppgtt(i915);
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}
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int i915_gem_context_live_selftests(struct drm_i915_private *dev_priv)
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{
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static const struct i915_subtest tests[] = {
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SUBTEST(igt_ctx_exec),
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};
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bool fake_alias = false;
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int err;
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/* Install a fake aliasing gtt for exercise */
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if (USES_PPGTT(dev_priv) && !dev_priv->mm.aliasing_ppgtt) {
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mutex_lock(&dev_priv->drm.struct_mutex);
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err = fake_aliasing_ppgtt_enable(dev_priv);
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mutex_unlock(&dev_priv->drm.struct_mutex);
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if (err)
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return err;
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GEM_BUG_ON(!dev_priv->mm.aliasing_ppgtt);
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fake_alias = true;
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}
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err = i915_subtests(tests, dev_priv);
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if (fake_alias) {
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mutex_lock(&dev_priv->drm.struct_mutex);
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fake_aliasing_ppgtt_disable(dev_priv);
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mutex_unlock(&dev_priv->drm.struct_mutex);
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}
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return err;
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}
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