Yu-cheng Yu b454feb9ab x86/fpu/xstate: Add supervisor PASID state for ENQCMD ... The ENQCMD instruction reads a PASID from the IA32_PASID MSR. The MSR is stored in the task's supervisor XSAVE* PASID state and is context-switched by XSAVES/XRSTORS. [ bp: Add (in-)definite articles and massage. ] Signed-off-by: Yu-cheng Yu <yu-cheng.yu@intel.com> Co-developed-by: Fenghua Yu <fenghua.yu@intel.com> Signed-off-by: Fenghua Yu <fenghua.yu@intel.com> Signed-off-by: Borislav Petkov <bp@suse.de> Reviewed-by: Tony Luck <tony.luck@intel.com> Link: https://lkml.kernel.org/r/1600187413-163670-6-git-send-email-fenghua.yu@intel.com		2020-09-17 20:22:10 +02:00
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asm	x86/fpu/xstate: Add supervisor PASID state for ENQCMD	2020-09-17 20:22:10 +02:00
uapi/asm	Support for FSGSBASE. Almost 5 years after the first RFC to support it,	2020-08-04 21:16:22 -07:00