forked from Minki/linux
73898db043
The dma_alloc_coherent() function returns a virtual address which can be used for coherent access to the underlying memory. On some architectures, like arm64, undefined behavior results if this memory is also accessed via virtual mappings that are not coherent. Because of their undefined nature, operations like virt_to_page() return garbage when passed virtual addresses obtained from dma_alloc_coherent(). Any subsequent mappings via vmap() of the garbage page values are unusable and result in bad things like bus errors (synchronous aborts in ARM64 speak). The mlx4 driver contains code that does the equivalent of: vmap(virt_to_page(dma_alloc_coherent)), this results in an OOPs when the device is opened. Prevent Ethernet driver to run this problematic code by forcing it to allocate contiguous memory. As for the Infiniband driver, at first we are trying to allocate contiguous memory, but in case of failure roll back to work with fragmented memory. Signed-off-by: Haggai Abramovsky <hagaya@mellanox.com> Signed-off-by: Yishai Hadas <yishaih@mellanox.com> Reported-by: David Daney <david.daney@cavium.com> Tested-by: Sinan Kaya <okaya@codeaurora.org> Signed-off-by: David S. Miller <davem@davemloft.net>
115 lines
4.0 KiB
C
115 lines
4.0 KiB
C
/*
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* Copyright (c) 2007 Mellanox Technologies. All rights reserved.
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*
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* This software is available to you under a choice of one of two
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* licenses. You may choose to be licensed under the terms of the GNU
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* General Public License (GPL) Version 2, available from the file
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* COPYING in the main directory of this source tree, or the
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* OpenIB.org BSD license below:
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*
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* Redistribution and use in source and binary forms, with or
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* without modification, are permitted provided that the following
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* conditions are met:
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*
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* - Redistributions of source code must retain the above
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* copyright notice, this list of conditions and the following
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* disclaimer.
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*
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* - Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials
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* provided with the distribution.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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*/
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#include <linux/slab.h>
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#include <linux/vmalloc.h>
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#include <linux/mlx4/qp.h>
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#include "mlx4_en.h"
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void mlx4_en_fill_qp_context(struct mlx4_en_priv *priv, int size, int stride,
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int is_tx, int rss, int qpn, int cqn,
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int user_prio, struct mlx4_qp_context *context)
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{
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struct mlx4_en_dev *mdev = priv->mdev;
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struct net_device *dev = priv->dev;
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memset(context, 0, sizeof *context);
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context->flags = cpu_to_be32(7 << 16 | rss << MLX4_RSS_QPC_FLAG_OFFSET);
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context->pd = cpu_to_be32(mdev->priv_pdn);
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context->mtu_msgmax = 0xff;
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if (!is_tx && !rss)
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context->rq_size_stride = ilog2(size) << 3 | (ilog2(stride) - 4);
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if (is_tx) {
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context->sq_size_stride = ilog2(size) << 3 | (ilog2(stride) - 4);
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if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_PORT_REMAP)
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context->params2 |= MLX4_QP_BIT_FPP;
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} else {
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context->sq_size_stride = ilog2(TXBB_SIZE) - 4;
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}
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context->usr_page = cpu_to_be32(mlx4_to_hw_uar_index(mdev->dev,
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mdev->priv_uar.index));
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context->local_qpn = cpu_to_be32(qpn);
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context->pri_path.ackto = 1 & 0x07;
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context->pri_path.sched_queue = 0x83 | (priv->port - 1) << 6;
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if (user_prio >= 0) {
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context->pri_path.sched_queue |= user_prio << 3;
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context->pri_path.feup = MLX4_FEUP_FORCE_ETH_UP;
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}
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context->pri_path.counter_index = priv->counter_index;
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context->cqn_send = cpu_to_be32(cqn);
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context->cqn_recv = cpu_to_be32(cqn);
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if (!rss &&
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(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_LB_SRC_CHK) &&
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context->pri_path.counter_index !=
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MLX4_SINK_COUNTER_INDEX(mdev->dev)) {
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/* disable multicast loopback to qp with same counter */
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if (!(dev->features & NETIF_F_LOOPBACK))
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context->pri_path.fl |= MLX4_FL_ETH_SRC_CHECK_MC_LB;
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context->pri_path.control |= MLX4_CTRL_ETH_SRC_CHECK_IF_COUNTER;
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}
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context->db_rec_addr = cpu_to_be64(priv->res.db.dma << 2);
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if (!(dev->features & NETIF_F_HW_VLAN_CTAG_RX))
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context->param3 |= cpu_to_be32(1 << 30);
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if (!is_tx && !rss &&
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(mdev->dev->caps.tunnel_offload_mode == MLX4_TUNNEL_OFFLOAD_MODE_VXLAN)) {
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en_dbg(HW, priv, "Setting RX qp %x tunnel mode to RX tunneled & non-tunneled\n", qpn);
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context->srqn = cpu_to_be32(7 << 28); /* this fills bits 30:28 */
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}
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}
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int mlx4_en_change_mcast_lb(struct mlx4_en_priv *priv, struct mlx4_qp *qp,
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int loopback)
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{
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int ret;
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struct mlx4_update_qp_params qp_params;
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memset(&qp_params, 0, sizeof(qp_params));
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if (!loopback)
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qp_params.flags = MLX4_UPDATE_QP_PARAMS_FLAGS_ETH_CHECK_MC_LB;
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ret = mlx4_update_qp(priv->mdev->dev, qp->qpn,
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MLX4_UPDATE_QP_ETH_SRC_CHECK_MC_LB,
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&qp_params);
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return ret;
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}
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void mlx4_en_sqp_event(struct mlx4_qp *qp, enum mlx4_event event)
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{
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return;
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}
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